Common pitfalls: Difference between revisions
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=Unwanted resets= | =Unwanted resets= | ||
* The [[watchdog]] isn't reset often enough, write a byte to | * The [[watchdog]] isn't reset often enough, write a byte to {{Reg|REG_DIPSW}} at least each frame. | ||
* An exception is occuring, set up a simple [[68k exception handling]] screen to debug your code. | * An exception is occuring, set up a simple [[68k exception handling]] screen to debug your code. | ||
* Misaligned word or longword read/write (address error) | * Misaligned word or longword read/write (address error) | ||
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=Erratic sprite movement or display= | =Erratic sprite movement or display= | ||
* Sprite is driven by the previous one. | * Sprite is driven by the previous one. | ||
* REG_VRAMRW or REG_VRAMMOD writes too fast. | * {{Reg|REG_VRAMRW}} or {{Reg|REG_VRAMMOD}} writes too fast. | ||
* '''Never''' use CLR instructions on [[Memory mapped registers|LSPC registers]]. | * '''Never''' use CLR instructions on [[Memory mapped registers|LSPC registers]]. | ||
* The [[68k interrupts|Timer interrupt]] routine has VRAM writes which interferes with the VBlank interrupt routine. Disable the Timer interrupt when out of the display area. | * The [[68k interrupts|Timer interrupt]] routine has VRAM writes which interferes with the VBlank interrupt routine. Disable the Timer interrupt when out of the display area. | ||
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* Some emulators ignore the [[68k interrupts|timer interrupt]], it may work on the real hardware. | * Some emulators ignore the [[68k interrupts|timer interrupt]], it may work on the real hardware. | ||
* The interrupt mask causes them to be ignored by the 68k. Check the SR register. | * The interrupt mask causes them to be ignored by the 68k. Check the SR register. | ||
* Wrong configuration of the timer interrupt, see | * Wrong configuration of the timer interrupt, see {{Reg|REG_LSPCMODE}}. | ||
* The interrupt vector points to an RTE or RTS. Beware of the different levels between cart and CD systems. | * The interrupt vector points to an RTE or RTS. Beware of the different levels between cart and CD systems. | ||
Revision as of 01:01, 14 August 2012
Check your hardware before checking your code...
Unwanted resets
- The watchdog isn't reset often enough, write a byte to REG_DIPSW at least each frame.
- An exception is occuring, set up a simple 68k exception handling screen to debug your code.
- Misaligned word or longword read/write (address error)
- RTS with wrong return address in stack (or bad SP ?)
- JSR instead of JMP
- Jump table with bad index (address error)
- Timer interrupt too fast, causes stack to explode
Invisible sprites
- Sprites are disabled (NeoGeo CD only, activated by default)
- The fix layer is filled with non-transparent tiles and hides everything. Clear fix with tiles filled with color 0.
- Sprite position is out of the 320x224 visible area.
- Sprite height is set to 0 (SCB3).
- Sprite tiles are all transparent (bad tile numbers ?).
- Tile colors are the same as the backdrop color
- Shrinking values too low (at least one pixel should still be visible).
- Bad C ROM, it happens...
- Reference color (0) is not black.
Invisible fix layer
- Fix is disabled (NeoGeo CD only, activated by default)
- No non-transparent tiles mapped (bad S ROM ?)
- Tile colors are the same as the backdrop color
- Tiles are on the invisible borders.
- Reference color is not black.
Wrong colors
- The wrong palette bank is selected.
- Reference color is not black.
- Palettes loading routine is broken (byte load instead of word, bad offset...).
- Tiles are assigned to an uninitialized palette.
Erratic sprite movement or display
- Sprite is driven by the previous one.
- REG_VRAMRW or REG_VRAMMOD writes too fast.
- Never use CLR instructions on LSPC registers.
- The Timer interrupt routine has VRAM writes which interferes with the VBlank interrupt routine. Disable the Timer interrupt when out of the display area.
Interrupts don't work
- Some emulators ignore the timer interrupt, it may work on the real hardware.
- The interrupt mask causes them to be ignored by the 68k. Check the SR register.
- Wrong configuration of the timer interrupt, see REG_LSPCMODE.
- The interrupt vector points to an RTE or RTS. Beware of the different levels between cart and CD systems.
Game doesn't boot (goes directly to the crosshatch)
- Check the "NEO-GEO" string at 0x100
- Check the security code at 0x182
Vblank routine is long
- Stop the timer interrupt when out of the active display. The timer interrupt can be very mean.