Revision as of 01:30, 12 October 2016

Chip found on late MVS boards.

Joypad I/O
Z80 address and port decoding
68k/Z80 communication latches and interrupt generation, similarly to NEO-D0.

Pinout

@@ Line 1: / Line 1: @@
-[[File:neo-sdr-t.jpg|thumb]]
+{{ChipInfo
+|picture=neo-sdr-t.jpg
+|pkg=QFP100R
+|manu=toshiba
+|date=1994 ?
+|gates=
+|used_on={{PCB|MV1B}} {{PCB|MV1C}} ...
+}}
-Chip found on MV1B and MV1C [[MVS hardware|slots]]. Handles [[Z80]] subsystem address and port decoding, Z80/68K communication latches and interrupt generation, similarly to [[NEO-D0]]. Handles controller I/Os as well.
+Chip found on late [[MVS hardware|MVS]] boards.
+* [[Joypad]] I/O
+* {{Chipname|Z80}} address and port decoding
+* [[68k/Z80 communication]] latches and interrupt generation, similarly to {{Chipname|NEO-D0}}.
-Draft pinout: [[File:neo-sdr.odg]]
-== Pinout ==
+=Pinout=
 [[File:Neo-sdr_pinout.png]]
+Draft pinout: [[File:neo-sdr.odg]]
 [[Category:Chips]]