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The NeoGeo reset "signal path" can be confusing. The involved signals are Sig.pngVCCON (MVS only) or Sig.pngRST (AES reset button and PST518B), Sig neg.pngRESET (main, clean reset signal), and Sig neg.pngRESETP (phase sync pulse for Chipicon.png NEO-D0).


The reset trigger starts with signals VCCON or RST, which come from either the reset button or the PST518B reset generator. It goes to Chipicon.png NEO-B1, which sets its internal watchdog timer to generate a long enough negative pulse on RESET. Chipicon.png LSPC2-A2 synchronizes the rising edge to the main clock's falling edge to output a 1mclk negative pulse on RESETP.

VCCON, RST and RESET seem to be open-collector lines. RESET is pulled high by a 4.7k resistor.



RESET might be synchronized with a clock reaching B1 (1MB ? 6MB ?).

RESETP is triggered by the watchdog also (since it asserts RESET).