Replacement chip

Dirty page for SNK chips replacements development.

Reading various [repair logs], it appears that dead or partially dead SNK chips are a common issue. It forces cannibalism and forcibly reduces the worldwide stock.

For preservation, it would be desirable to produce drop-in replacement chips to save original boards.

Considered solutions

Nobody likes rewiring to accomodate different pinouts, especially 80+ pins chips. Producing new ASICs is out of the question because of the price at low quantities, and because finding pin-compatible models todays would be difficult if not impossible.

The only solution would be adapter boards the size of the original chips, with castellated vias for surface mounting ? Furrtek (talk) 18:41, 15 January 2016 (CET)

• Reconstruct the chip's logic with regular logic chips ? No: they're all too big. BGA parts aren't 5V compatible.
• Use 2 boards on top of each other with a mezzanine connector ? No, no, no.
• Use 1- or 2-gate SOT-23-5/6 chips ? Maybe in some cases, but would be expensive (long BOM, lots of parts to assemble).
• Use a CPLD ? Probably the best solution. Altera's MAX3000 and Xilinx's XC9500 are 5V-tolerant and are still available at reasonable prices.

CPLD proposals

• NEO-257: 53 I/Os, EPM3064 in TQFP100 ?
• NEO-273: Only used in cartridges, rarely dies. A clone wouldn't be that useful ?
• NEO-BUF: Really a pain, too small for QFP CPLDs. 74LVCH16245 in BGA56 ?
• PRO-C0: Need pinout, quite big so EPM3128 in TQFP144 ?
• NEO-C1: EPM3128 has enough I/Os, but too big in TQFP144.
• NEO-D0: 55 I/Os, EPM3064 in TQFP100 ?
• NEO-E0: 54 I/Os, EPM3064 in TQFP100 ?
• NEO-F0: 60 I/Os, EPM3064 in TQFP100 ?
• NEO-G0: 56 I/Os, EPM3064 in TQFP100 ?
• NEO-I0: 56 I/Os, EPM3064 in TQFP100 ?
• NEO-ZMC: Very small, can be found on AliExpress (January 2016). BGA ?
• NEO-ZMC2: 71 I/Os, EPM3128 in TQFP100 ?
• PCM: Only used in cartridges, rarely dies. 65 I/Os, EPM3064 in TQFP100 ?
• NEO-DCR-T, NEO-SDR-T: Need pinouts, probably same problem as for NEO-C1.

• LSPCs could be replaced but the I/O requirements directs to >$60 CPLDs.
• Line buffers (PRO-B0, NEO-B1) could be replaced with MAX10's and level shifting ?. Might be too expensive.

Board proposals

Which board houses are castellation friendly ? Is classic 1.6mm good ?

Logic definitions

To do.