68k interrupts: Difference between revisions

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Interrupts need to be acknowledged by writing to register {{Reg|REG_IRQACK}}.
Interrupts need to be acknowledged by writing to register {{Reg|REG_IRQACK}}.
*bit2: Ack VBlank interrupt
*bit 2: Acknowledge vblank interrupt
*bit1: Ack Timer interrupt
*bit 1: Acknowledge [[timer interrupt]]
*bit0: Ack level 3
*bit 0: Acknowledge cold start interrupt


Multiple bits can be set:
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move #$0007,REG_IRQACK    ; Acknowledge all interrupts
move #$0007,REG_IRQACK    ; Acknowledge all interrupts
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Bits 8~10 of the SR register are used to mask them.
Bits 8~10 of the SR register can be used to mask them.


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== Vertical Blank interrupt ==
=Vertical blank interrupt=


The VBlank interrupt is almost always used. It occurs everytime a new frame is traced (~60Hz). See [[display timing]].
The vblank interrupt is almost always used. It occurs when the rendering of a frame finishes (~60 times per second). See [[display timing]].


== [[Timer interrupt]] ==
=[[Timer interrupt]]=


The timer interrupt's behavior can be programmed through the [[GPU]]'s [[memory mapped registers]]. It is made of a down-counting 32bit register clocked by the 6MHz pixel clock, and a corresponding set register. When the counter reaches 0, an interrupt is generated. Intervals can range from 166.7µs to 11.9 minutes (?). The Sammy logo at the start of [[Viewpoint]] is an example of its use. [[Sengoku 2]] and [[Neo Turf Masters]] are also known to rely on them to do [[scanline effects]].
The timer interrupt's behavior can be programmed through the [[GPU]]'s [[memory mapped registers]]. It is triggered by a 32-bit down counter clocked by the 6MHz pixel clock, and a corresponding reset register. When the counter reaches 0, an interrupt is generated. Intervals can range from 166.7ns ('''dangerous interrupt flood''') to 11.9 minutes (?).


== AES/MVS interrupts levels ==
It can be used for special video effects such as [[scanline effects]], for example:
* The interlaced Sammy logo in [[Viewpoint]]
* [[Sengoku 2]]'s intro
* The road in [[Riding hero]]
* [[Neo Turf Masters]]'s ground perspective
* ...


*VBlank: Level 0
=AES/MVS interrupt levels=
 
*Vblank: Level 0
*Timer: Level 1
*Timer: Level 1
*Pending after cold reset: Level 2
*Pending after cold reset: Level 2


== CD interrupts levels ==
=CD interrupt levels=


*VBlank: Level 1
*VBlank: Level 1 !
*Timer: Level 0
*Timer: Level 0 !


[[Category:Base system]]
[[Category:Base system]]
[[Category:Code]]
[[Category:Code]]

Revision as of 06:53, 16 January 2016

There are 3 interrupt levels on the AES and MVS. Only 2 on the CD hardware.

Interrupts need to be acknowledged by writing to register REG_IRQACK.

  • bit 2: Acknowledge vblank interrupt
  • bit 1: Acknowledge timer interrupt
  • bit 0: Acknowledge cold start interrupt

Multiple bits can be set:

move	#$0007,REG_IRQACK     ; Acknowledge all interrupts

Bits 8~10 of the SR register can be used to mask them.

move	#$2000,SR     ; Enable all interrupts (+Supervisor mode)
move	#$2700,SR     ; Disable all interrupts (+Supervisor mode)

Vertical blank interrupt

The vblank interrupt is almost always used. It occurs when the rendering of a frame finishes (~60 times per second). See display timing.

Timer interrupt

The timer interrupt's behavior can be programmed through the GPU's memory mapped registers. It is triggered by a 32-bit down counter clocked by the 6MHz pixel clock, and a corresponding reset register. When the counter reaches 0, an interrupt is generated. Intervals can range from 166.7ns (dangerous interrupt flood) to 11.9 minutes (?).

It can be used for special video effects such as scanline effects, for example:

AES/MVS interrupt levels

  • Vblank: Level 0
  • Timer: Level 1
  • Pending after cold reset: Level 2

CD interrupt levels

  • VBlank: Level 1 !
  • Timer: Level 0 !