68k interrupts

There are 3 interrupt levels on the AES and MVS. Only 2 on the CD hardware.

Interrupts need to be acknowledged by writing to register REG_IRQACK.

• bit2: Ack VBlank interrupt
• bit1: Ack Timer interrupt
• bit0: Ack level 3

move	#$0007,REG_IRQACK     ; Acknowledge all interrupts

Bits 8~10 of the SR register are used to mask them.

move	#$2000,SR     ; Enable all interrupts (+Supervisor mode)
move	#$2700,SR     ; Disable all interrupts (+Supervisor mode)

Vertical Blank interrupt

The VBlank interrupt is almost always used. It occurs everytime a new frame is traced (~60Hz). See display timing.

Timer interrupt

The timer interrupt's behavior can be programmed through the GPU's memory mapped registers. It is made of a down-counting 32bit register clocked by the 6MHz pixel clock, and a corresponding set register. When the counter reaches 0, an interrupt is generated. Intervals can range from 166.7µs to 11.9 minutes (?). The Sammy logo at the start of Viewpoint is an example of its use. Sengoku 3 and Neo Turf Masters are also known to rely on them to do scanline effects.

AES/MVS interrupts levels

• VBlank: Level 0
• Timer: Level 1
• Pending after cold reset: Level 2

CD interrupts levels

• VBlank: Level 1
• Timer: Level 0