Schematics: Difference between revisions
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=AES= | |||
{| | |||
|[[File:Neogeo_aes_schematics_pal_2-page-001.jpg|256px|Page 1]] | |||
[[File:Neogeo_aes_schematics_pal_2-page-002.jpg|256px|Page 2]] | |||
[[File:Neogeo_aes_schematics_pal_2-page-003.jpg|256px|Page 3]] | |||
[[File:Neogeo_aes_schematics_pal_2-page-004.jpg|256px|Page 4]] | |||
|[[File:Neogeo_aes_schematics_pal_2-page-005.jpg|256px|Page 5]] | |||
[[File:Neogeo_aes_schematics_pal_2-page-006.jpg|256px|Page 6]] | |||
[[File:Neogeo_aes_schematics_pal_2-page-007.jpg|256px|Page 7]] | |||
[[File:Neogeo_aes_schematics_pal_2-page-008.jpg|256px|Page 8]] | |||
|[[File:Neogeo_aes_schematics_pal_2-page-009.jpg|256px|Page 9]] | |||
[[File:Neogeo_aes_schematics_pal_2-page-010.jpg|256px|Page 10]] | |||
[[File:Neogeo_aes_schematics_pal_2-page-011.jpg|256px|Page 11]] | |||
|} | |||
=MVS= | |||
<span style="color:#FF0000"><B>Beware !</B> There's an error on page 9 (cartridge edge connections): <b>ROMOE/4MB are swapped</B>. ROMOE should be on pin 33 bottom, and 4MB is on pin 34 bottom.</span> | <span style="color:#FF0000"><B>Beware !</B> There's an error on page 9 (cartridge edge connections): <b>ROMOE/4MB are swapped</B>. ROMOE should be on pin 33 bottom, and 4MB is on pin 34 bottom.</span> | ||
=Page 1= | ==Page 1== | ||
[[File:mv1fs-page1.jpg|thumb|Page 1]] | [[File:mv1fs-page1.jpg|thumb|Page 1]] | ||
*[[68k]] | *[[68k]] | ||
Line 12: | Line 30: | ||
*battery circuit | *battery circuit | ||
=Page 2= | ==Page 2== | ||
[[File:mv1fs-page2.jpg|thumb|Page 2]] | [[File:mv1fs-page2.jpg|thumb|Page 2]] | ||
*[[LSPC2-A2]] | *[[LSPC2-A2]] | ||
Line 22: | Line 40: | ||
*[[LO]] | *[[LO]] | ||
=Page 3= | ==Page 3== | ||
[[File:mv1fs-page3.jpg|thumb|Page 3]] | [[File:mv1fs-page3.jpg|thumb|Page 3]] | ||
*System register latch | *System register latch | ||
Line 29: | Line 47: | ||
*[[video DAC]] | *[[video DAC]] | ||
=Page 4= | ==Page 4== | ||
[[File:mv1fs-page4.jpg|thumb|Page 4]] | [[File:mv1fs-page4.jpg|thumb|Page 4]] | ||
*[[Z80]] | *[[Z80]] | ||
Line 39: | Line 57: | ||
*[[headphone amp]] | *[[headphone amp]] | ||
=Page 5= | ==Page 5== | ||
[[File:mv1fs-page5.jpg|thumb|Page 5]] | [[File:mv1fs-page5.jpg|thumb|Page 5]] | ||
*[[speaker amp]] | *[[speaker amp]] | ||
Line 46: | Line 64: | ||
*cab outputs | *cab outputs | ||
=Page 6= | ==Page 6== | ||
[[File:mv1fs-page6.jpg|thumb|Page 6]] | [[File:mv1fs-page6.jpg|thumb|Page 6]] | ||
Daughterboard connections (0%) | Daughterboard connections (0%) | ||
=Page 7= | ==Page 7== | ||
[[File:mv1fs-page7.jpg|thumb|Page 7]] | [[File:mv1fs-page7.jpg|thumb|Page 7]] | ||
=Page 8= | ==Page 8== | ||
[[File:mv1fs-page8.jpg|thumb|Page 8]] | [[File:mv1fs-page8.jpg|thumb|Page 8]] | ||
Daughterboard connections (0%) | Daughterboard connections (0%) | ||
=Page 9= | ==Page 9== | ||
[[File:mv1fs-page9.jpg|thumb|Page 9]] | [[File:mv1fs-page9.jpg|thumb|Page 9]] | ||
Cartridge connections (0%) | Cartridge connections (0%) |
Revision as of 15:15, 1 October 2014
AES
MVS
Beware ! There's an error on page 9 (cartridge edge connections): ROMOE/4MB are swapped. ROMOE should be on pin 33 bottom, and 4MB is on pin 34 bottom.
Page 1
Page 2
Page 3
- System register latch
- NEO-E0
- palette RAM
- video DAC
Page 4
Page 5
- speaker amp
- NEO-F0
- DIP switches
- cab outputs
Page 6
Daughterboard connections (0%)
Page 7
Page 8
Daughterboard connections (0%)
Page 9
Cartridge connections (0%)
Vectorized version: Link to last SVG file: