Memory mapped registers: Difference between revisions

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Note: Most of the register names come from neogeo_spex.pdf
Note: Most of the register names come from neogeo_spex.pdf


=Common registers=
==I/O registers==
==I/O registers==
Always read/written as bytes (?)
{| class="regdef"
{| class="regdef"
|'''Address'''
|'''Address'''
|'''Name'''
|'''Name'''
|'''Size'''
|'''Read'''
|'''Read'''
|'''Write'''
|'''Write'''
Line 13: Line 13:
|$300000
|$300000
|REG_P1CNT
|REG_P1CNT
|Byte
|Player 1 controls (active low)
|Player 1 controls (active low)
{{8BitRegister|D|1|C|1|B|1|A|1|Right|1|Left|1|Down|1|Up|1}}
{{8BitRegister|D|1|C|1|B|1|A|1|Right|1|Left|1|Down|1|Up|1}}
Line 21: Line 20:
|$300001
|$300001
|REG_DIPSW
|REG_DIPSW
|Byte
|Dipswitches (active low)
|Dipswitches (active low)
{{8BitRegister|Freeze|1|Freeplay|1|Coin meters ?|3|Autofire|1|?|1|Test mode|1}}
{{8BitRegister|Freeze|1|Freeplay|1|[[Multiplayer]] configuration|3|Autofire|1|?|1|Test mode|1}}
|Kick watchdog
|Kick watchdog
|[[NEO-F0]] (read)
|[[NEO-F0]] (read)
Line 29: Line 27:
|$300081
|$300081
|?
|?
|Byte
|Read only
|Read only
|?
|?
Line 36: Line 33:
|$320000
|$320000
|REG_SOUND
|REG_SOUND
|Byte
|[[68k/Z80 communication|Send command to Z80]]
|[[68k/Z80 communication|Send command to Z80]]
|Read Z80 reply code
|Read Z80 reply code
Line 43: Line 39:
|$320001
|$320001
|REG_STATUS_A  
|REG_STATUS_A  
|Byte
|{{8BitRegister|?|8}}
|{{8BitRegister|?|8}}
|?
|?
Line 50: Line 45:
|$340000
|$340000
|REG_P2CNT
|REG_P2CNT
|Byte
|Player 2 controls (active low)
|Player 2 controls (active low)
{{8BitRegister|D|1|C|1|B|1|A|1|Right|1|Left|1|Down|1|Up|1}}
{{8BitRegister|D|1|C|1|B|1|A|1|Right|1|Left|1|Down|1|Up|1}}
Line 58: Line 52:
|$380000
|$380000
|REG_STATUS_B
|REG_STATUS_B
|Byte
|{{8BitRegister|?|1|[[Memory card]]<br>write protect|2|Memory card<br>inserted|1|Select P2|1|Start P2|1|Select P1|1|Start P1|1|}}
|{{8BitRegister|?|1|Memory card write protect|2|Memory card inserted|1|Select P2|1|Start P2|1|Select P1|1|Start P1|1|}}
|?
|?
|[[NEO-C1]]
|[[NEO-C1]]
|-
|-
|$380001
|$380001
|REG_POUTPUT
|?
|?
|Byte
|Joypad ports [[Pinouts#joypad ports|outputs]]
|?
|Joypad ports outputs
{{8BitRegister|?|2|P2 outputs|3|P1 outputs|3}}
{{8BitRegister|?|2|P2 outputs|3|P1 outputs|3}}
MAME select_controller
MAME select_controller
Line 74: Line 66:
|$380011
|$380011
|?
|?
|Byte
|?
|?
|Write only, after a write to $3A0019
|Write only, after a write to $3A0019
Line 81: Line 72:
|$380021
|$380021
|REG_SLOT
|REG_SLOT
|Byte
|?
|?
|{{8BitRegister|?|5|Slot #|3|}}
|{{8BitRegister|?|5|Slot #|3|}}
Line 88: Line 78:
|$380030(1?)
|$380030(1?)
|?
|?
|Byte
|?
|?
|MAME set_output_latch (LED marquee ?)
|MAME set_output_latch (LED marquee ?)
Line 95: Line 84:
|$380040(1?)
|$380040(1?)
|?
|?
|Byte
|?
|?
|MAME set_output_data (LED marquee ?)
|MAME set_output_data (LED marquee ?)
Line 102: Line 90:
|$380050(1?)
|$380050(1?)
|?
|?
|Byte
|?
|?
|MAME upd4990a_control_16_w ([[Calendar]])
|MAME upd4990a_control_16_w ([[Calendar]])
Line 109: Line 96:
|$380061
|$380061
|?
|?
|Byte
|?
|?
|Base address for writes (used by the MVS BIOS)
|Base address for writes (used by the MVS BIOS)
Line 116: Line 102:
|$380065
|$380065
|?
|?
|Byte
|?
|?
|Write only (used by the MVS BIOS)
|Write only (used by the MVS BIOS)
Line 123: Line 108:
|$380067
|$380067
|?
|?
|Byte
|?
|?
|Write only (used by the MVS BIOS)
|Write only (used by the MVS BIOS)
Line 131: Line 115:


==System registers==
==System registers==
Handled by a 74HC259 adressable latch.
Handled by a 74HC259 adressable latch on cart systems. Byte writes only.
{| class="regdef"
{| class="regdef"
|'''Address'''
|'''Address'''
|'''Name'''
|'''Name'''
|'''Size'''
|'''Read'''
|'''Write'''
|'''Write'''
|-
|-
|$3A0001
|$3A0001
|REG_DISPENABL
|REG_DISPENABL
|Byte
|Invalid
|Normal video output
|Normal video output
|-
|-
|$3A0011
|$3A0011
|REG_DISPDSABL
|REG_DISPDSABL
|Byte
|Invalid
|[[Video DAC|Darken]] video output
|[[Video DAC|Darken]] video output
|-
|-
|$3A0003
|$3A0003
|?
|?
|Byte
|Invalid
|Use the [[BIOSes|BIOS]] vector table
|Use the [[BIOSes|BIOS]] vector table
|-
|-
|$3A0013
|$3A0013
|REG_SWPROM
|REG_SWPROM
|Byte
|Invalid
|Use the cart's vector table
|Use the cart's vector table
|-
|-
|$3A0005
|$3A0005
|REG_CRDUNLOCK1
|REG_CRDUNLOCK1
|Byte
|Invalid
|Allow /WE to pass through to memory card when low
|Allow /WE to pass through to memory card when low
|-
|-
|$3A0015
|$3A0015
|REG_CRDLOCK1
|REG_CRDLOCK1
|Byte
|Invalid
|Don't allow /WE to pass through to memory card
|Don't allow /WE to pass through to memory card
|-
|-
|$3A0007
|$3A0007
|REG_CRDLOCK2
|REG_CRDLOCK2
|Byte
|Invalid
|Don't allow /WE to pass through to memory card
|Don't allow /WE to pass through to memory card
|-
|-
|$3A0017
|$3A0017
|REG_CRDUNLOCK1
|REG_CRDUNLOCK1
|Byte
|Invalid
|Allow /WE to pass through to memory card when high     
|Allow /WE to pass through to memory card when high     
|-
|-
|$3A0009
|$3A0009
|?
|?
|Byte
|Invalid
|?
|?
|-
|-
|$3A0019
|$3A0019
|?
|?
|Byte
|Invalid
|?
|?
|-
|-
|$3A000B
|$3A000B
|REG_BRDFIX
|REG_BRDFIX
|Byte
|Invalid
|Use the embeded fix tileset ([[SFIX]])
|Use the embeded fix tileset ([[SFIX]])
|-
|-
|$3A001B
|$3A001B
|REG_CRTFIX
|REG_CRTFIX
|Byte
|Invalid
|Use the cart's fix tileset
|Use the cart's fix tileset
|-
|-
|$3A000D
|$3A000D
|REG_SRAMLOCK
|REG_SRAMLOCK
|Byte
|Write-protects [[Battery-backed RAM|SRAM]] (MVS)
|Invalid
|Write-protects the SRAM (MVS)
|-
|-
|$3A001D
|$3A001D
|REG_SRAMULOCK
|REG_SRAMULOCK
|Byte
|Invalid
|Unprotects SRAM (MVS)
|Unprotects SRAM (MVS)
|-
|-
|$3A000F
|$3A000F
|REG_PALBANK1
|REG_PALBANK1
|Byte
|Invalid
|Use palette bank 1
|Use palette bank 1
|-
|-
|$3A001F
|$3A001F
|REG_PALBANK0
|REG_PALBANK0
|Byte
|Invalid
|Use palette bank 0
|Use palette bank 0
|}
|}
Line 238: Line 188:


==Video registers==
==Video registers==
Probably handled by the [[LSPC2-A2|LSPC]] chips.
Handled by the [[GPU]]s.
{| class="regdef"
{| class="regdef"
|'''Address'''
|'''Address'''
Line 249: Line 199:
|REG_VRAMADDR
|REG_VRAMADDR
|Word
|Word
|Read VRAM (address isn't changed)
|Read [[VRAM]] (address isn't changed)
|Sets VRAM address
|Sets VRAM address
|-
|-
Line 259: Line 209:
|-
|-
|$3C0004
|$3C0004
|REG_VRAMMOD
|Word
|Word
|REG_VRAMMOD
|Reads VRAM address modulo
|Reads VRAM address modulo
|Sets VRAM address modulo (signed)
|Sets VRAM address modulo (signed)
Line 267: Line 217:
|REG_HBLANKCNT
|REG_HBLANKCNT
|Word
|Word
|{{16BitRegister|Raster line counter|9|?|3|1:50Hz<br>0:60Hz|1|[[Auto animation]] counter|3}}
|{{16BitRegister|Raster line counter.<br>See [[Display timing]]|9|?|3|1:50Hz<br>0:60Hz|1|[[Auto animation]] counter|3}}
Line counter: (diagram needed)<br>
|{{16BitRegister|Auto animation speed<br>(in frames)|8|Raster interrupt<br>mode|3|Raster interrupt<br>enable|1|Disable auto animation|1|?|3}}
$00F8-$00FF : Vertical sync<br>
$0100-$010F : Top border<br>
$0110-$01EF : Active display<br>
$01F0-$01FF : Bottom border<br>
|{{16BitRegister|Auto animation speed (in frames)|8|HBlank (RLI) interrupt mode|3|HBlank interrupt enabled|1|Disable auto animation|1|?|3}}
|-
|-
|$3C0008
|$3C0008
Line 301: Line 246:
|}
|}


=NeoGeo CD only (from NeoCD's source)=
==NeoGeo CD registers==


[[NEO-MGA]] / [[LC8953]] ?
[[NEO-MGA]] / [[LC8953]] / [[LC98000]] ?
{| class="regdef"
{| class="regdef"
|'''Address'''
|'''Address'''
Line 316: Line 261:
|Word
|Word
|?
|?
|NeoRaine load_files
|?
|-
|$FF0004
|?
|Word
|?
|CDM3-2 BIOS writes 0,1,3,7
|?
|-
|$FF000E
|?
|Byte
|?
|CDM3-2 BIOS writes $3F,$3C
|?
|-
|$FF000F
|?
|Byte
|?
|CDM3-2 BIOS writes $20,$10,$08,$04
|?
|?
|rowspan="9"|?
|-
|$FF0011
|?
|Byte
|?
|CDM3-2 BIOS writes $FE
|?
|-
|$FF0017
|?
|Byte
|colspan="2"|CDM3-2 BIOS read/writes bit 0
|?
|-
|$FF0061
|?
|Byte
|?
|Bit4: Run microcode ?
|rowspan="3"|[[LC8953]]
|-
|$FF0064~$FF0070
|?
|(Long)words
|?
|Registers used by microcode (NeoRaine upload_param)
|-
|-
|$FF007E~$FF008F
|$FF007E~$FF008F
|?
|?
|Word
|Words
|?
|Microcode (16x9bit instructions ?)
|-
|$FF0101
|?
|Byte
|?
|CDM3-2 BIOS writes low nibble
|?
|-
|$FF0103
|?
|Byte
|colspan="2"|CDM3-2 BIOS: sequential read/writes
|?
|?
|dma_mode
|-
|-
|$FF0105
|$FF0105
Line 330: Line 335:
|?
|?
|upload_type_w
|upload_type_w
|?
|-
|$FF0108
|?
|Word
|?
|CDM3-2 BIOS writes $5555
|?
|-
|$FF010C
|?
|Word
|?
|CDM3-2 BIOS writes $5555 and reads
|?
|-
|-
|$FF0111
|$FF0111
Line 336: Line 356:
|?
|?
|spr_disable
|spr_disable
|?
|-
|-
|$FF0115
|$FF0115
Line 342: Line 363:
|?
|?
|fix_disable
|fix_disable
|?
|-
|-
|$FF0119
|$FF0119
Line 348: Line 370:
|?
|?
|video_enable
|video_enable
|?
|-
|-
|$FF011C
|$FF011C
|?
|?
|Word
|Word
|region_code, 0xFF
|4 bit region_code + CD open/close ?, 0xFF
|?
|?
|?
|-
|$FF0121
|REG_UPSELSPR
|rowspan="8"|Byte
|
|0/1 Map SPR in $E00000 ?
|rowspan="8"|?
|-
|$FF0123
|REG_UPSELPCM
|
|0/1 Map PCM in $E00000 ?
|-
|$FF0127
|REG_UPSELZ80
|
|0/1 Map Z80 in $E00000 ?
|-
|$FF0129
|REG_UPSELFIX
|
|0/1 Map FIX in $E00000 ?
|-
|$FF0141
|REG_UPUNMAPSPR
|
|0/1 Unmap SPR in $E00000 ?
|-
|$FF0143
|REG_UPUNMAPPCM
|
|0/1 Unmap PCM in $E00000 ?
|-
|$FF0147
|REG_UNMAPZ80
|
|0/1 Unmap Z80 in $E00000 ?
|-
|$FF0149
|REG_UNMAPFIX
|
|0/1 Unmap FIX in $E00000 ?
|-
|-
|$FF016F
|$FF016F
Line 360: Line 426:
|?
|?
|disable_irq_w
|disable_irq_w
|?
|-
|-
|$FF0183
|$FF0183
Line 366: Line 433:
|?
|?
|z80_enable
|z80_enable
|?
|-
|-
|$FF0188
|$FF0188
|?
|REG_CDDALEFTL
|Word
|rowspan="2"|Word
|[[Reading CDDA sound levels|REG_CDDALEFTL]]
|rowspan="2"|See [[Reading CDDA sound levels]]
|?
|?
|rowspan="2"|[[NEO-MGA]]
|rowspan="2"|[[NEO-MGA]]
|-
|-
|$FF018A
|$FF018A
|REG_CDDARIGHTL
|?
|?
|Word
|-
|[[Reading CDDA sound levels|REG_CDDARIGHTL]]
|$FF01A1
|?
|Byte
|?
|CDM3-2 BIOS writes 0,1,2
|?
|-
|$FF01A3
|?
|Byte
|?
|CDM3-2 BIOS writes 0,1
|?
|-
|$FF01A7
|?
|Byte
|?
|CDM3-2 BIOS writes
|?
|?
|}
|}

Revision as of 15:36, 13 March 2011

Note: Most of the register names come from neogeo_spex.pdf

I/O registers

Always read/written as bytes (?)

Address Name Read Write Handled by
$300000 REG_P1CNT Player 1 controls (active low)
Bit 7 6 5 4 3 2 1 0
Def D CBARightLeftDownUp
? NEO-C1
$300001 REG_DIPSW Dipswitches (active low)
Bit 7 6 5 4 3 2 1 0
Def Freeze FreeplayMultiplayer configurationAutofire?Test mode
Kick watchdog NEO-F0 (read)
$300081 ? Read only ? ?
$320000 REG_SOUND Send command to Z80 Read Z80 reply code NEO-D0 ?
$320001 REG_STATUS_A
Bit 7 6 5 4 3 2 1 0
Def ?
? ?
$340000 REG_P2CNT Player 2 controls (active low)
Bit 7 6 5 4 3 2 1 0
Def D CBARightLeftDownUp
? NEO-C1
$380000 REG_STATUS_B
Bit 7 6 5 4 3 2 1 0
Def ? Memory card
write protect
Memory card
inserted
Select P2Start P2Select P1Start P1
? NEO-C1
$380001 REG_POUTPUT ? Joypad ports outputs
Bit 7 6 5 4 3 2 1 0
Def ? P2 outputsP1 outputs

MAME select_controller

NEO-D0
$380011 ? ? Write only, after a write to $3A0019 ?
$380021 REG_SLOT ?
Bit 7 6 5 4 3 2 1 0
Def ? Slot #
NEO-F0?
$380030(1?) ? ? MAME set_output_latch (LED marquee ?) NEO-F0?
$380040(1?) ? ? MAME set_output_data (LED marquee ?) NEO-F0?
$380050(1?) ? ? MAME upd4990a_control_16_w (Calendar) NEO-F0?
$380061 ? ? Base address for writes (used by the MVS BIOS) ?
$380065 ? ? Write only (used by the MVS BIOS) ?
$380067 ? ? Write only (used by the MVS BIOS) ?


System registers

Handled by a 74HC259 adressable latch on cart systems. Byte writes only.

Address Name Write
$3A0001 REG_DISPENABL Normal video output
$3A0011 REG_DISPDSABL Darken video output
$3A0003 ? Use the BIOS vector table
$3A0013 REG_SWPROM Use the cart's vector table
$3A0005 REG_CRDUNLOCK1 Allow /WE to pass through to memory card when low
$3A0015 REG_CRDLOCK1 Don't allow /WE to pass through to memory card
$3A0007 REG_CRDLOCK2 Don't allow /WE to pass through to memory card
$3A0017 REG_CRDUNLOCK1 Allow /WE to pass through to memory card when high
$3A0009 ? ?
$3A0019 ? ?
$3A000B REG_BRDFIX Use the embeded fix tileset (SFIX)
$3A001B REG_CRTFIX Use the cart's fix tileset
$3A000D REG_SRAMLOCK Write-protects SRAM (MVS)
$3A001D REG_SRAMULOCK Unprotects SRAM (MVS)
$3A000F REG_PALBANK1 Use palette bank 1
$3A001F REG_PALBANK0 Use palette bank 0


Video registers

Handled by the GPUs.

Address Name Size Read Write
$3C0000 REG_VRAMADDR Word Read VRAM (address isn't changed) Sets VRAM address
$3C0002 REG_VRAMRW Word Read VRAM (address isn't changed) Write VRAM
$3C0004 REG_VRAMMOD Word Reads VRAM address modulo Sets VRAM address modulo (signed)
$3C0006 REG_HBLANKCNT Word
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def Raster line counter.
See Display timing
?1:50Hz
0:60Hz
Auto animation counter
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def Auto animation speed
(in frames)
Raster interrupt
mode
Raster interrupt
enable
Disable auto animation?
$3C0008 REG_HBLANKPOS Word Invalid MSB of RLI position (number of pixels)
$3C000A ? Word Invalid LSB of RLI position (number of pixels)
$3C000C REG_IRQACK Byte Invalid Interrupt Acknowledge.
Bit 7 6 5 4 3 2 1 0
Def ? Ack VBlankAck HBlankAck IRQ3
$3C000E

$3C000F

? ? Some emulators treat these locations like $3C000A.

NeoGeo CD registers

NEO-MGA / LC8953 / LC98000 ?

Address Name Size Read Write Handled by
$FF0002 ? Word ? NeoRaine load_files ?
$FF0004 ? Word ? CDM3-2 BIOS writes 0,1,3,7 ?
$FF000E ? Byte ? CDM3-2 BIOS writes $3F,$3C ?
$FF000F ? Byte ? CDM3-2 BIOS writes $20,$10,$08,$04 ?
$FF0011 ? Byte ? CDM3-2 BIOS writes $FE ?
$FF0017 ? Byte CDM3-2 BIOS read/writes bit 0 ?
$FF0061 ? Byte ? Bit4: Run microcode ? LC8953
$FF0064~$FF0070 ? (Long)words ? Registers used by microcode (NeoRaine upload_param)
$FF007E~$FF008F ? Words ? Microcode (16x9bit instructions ?)
$FF0101 ? Byte ? CDM3-2 BIOS writes low nibble ?
$FF0103 ? Byte CDM3-2 BIOS: sequential read/writes ?
$FF0105 ? Byte ? upload_type_w ?
$FF0108 ? Word ? CDM3-2 BIOS writes $5555 ?
$FF010C ? Word ? CDM3-2 BIOS writes $5555 and reads ?
$FF0111 ? Byte ? spr_disable ?
$FF0115 ? Byte ? fix_disable ?
$FF0119 ? Byte ? video_enable ?
$FF011C ? Word 4 bit region_code + CD open/close ?, 0xFF ? ?
$FF0121 REG_UPSELSPR Byte 0/1 Map SPR in $E00000 ? ?
$FF0123 REG_UPSELPCM 0/1 Map PCM in $E00000 ?
$FF0127 REG_UPSELZ80 0/1 Map Z80 in $E00000 ?
$FF0129 REG_UPSELFIX 0/1 Map FIX in $E00000 ?
$FF0141 REG_UPUNMAPSPR 0/1 Unmap SPR in $E00000 ?
$FF0143 REG_UPUNMAPPCM 0/1 Unmap PCM in $E00000 ?
$FF0147 REG_UNMAPZ80 0/1 Unmap Z80 in $E00000 ?
$FF0149 REG_UNMAPFIX 0/1 Unmap FIX in $E00000 ?
$FF016F ? Byte ? disable_irq_w ?
$FF0183 ? Byte ? z80_enable ?
$FF0188 REG_CDDALEFTL Word See Reading CDDA sound levels ? NEO-MGA
$FF018A REG_CDDARIGHTL ?
$FF01A1 ? Byte ? CDM3-2 BIOS writes 0,1,2 ?
$FF01A3 ? Byte ? CDM3-2 BIOS writes 0,1 ?
$FF01A7 ? Byte ? CDM3-2 BIOS writes ?