Memory mapped registers: Difference between revisions

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m (Additions from official SNK doc)
m (Name changes and a few bits added)
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|-
|-
|$3C0006
|$3C0006
|REG_HBLANKCNT
|REG_LSPCMODE
|Word
|Word
|{{16BitRegister|Raster line counter.<br>See [[Display timing]]|9|?|3|1:50Hz<br>0:60Hz ([[GPU|LSPC2]] only)|1|[[Auto animation]] counter|3}}
|{{16BitRegister|Raster line counter.<br>See [[Display timing]]|9|-|3|1:50Hz<br>0:60Hz ([[GPU|LSPC2]] only)|1|[[Auto animation]] counter|3}}
|{{16BitRegister|Auto animation speed<br>(in frames)|8|Raster interrupt<br>mode|3|Raster interrupt<br>enable|1|Disable auto animation|1|?|3}}
|{{16BitRegister|Auto animation speed<br>(in frames)|8|[[Timer interrupt]]<br>mode|3|Timer interrupt enable|1|Disable auto animation|1|?|3}}
|-
|-
|$3C0008
|$3C0008
|REG_HBLANKPOS
|REG_TIMERHIGH
|Word
|Word
|Invalid
|Invalid
|MSB of [[68k interrupts|RLI]] position (number of pixels)
|MSBs of timer reload value.
|-
|-
|$3C000A
|$3C000A
|?
|REG_TIMERLOW
|Word  
|Word  
|Invalid
|Invalid
|LSB of RLI position (number of pixels)
|LSBs of timer reload value.
|-
|-
|$3C000C
|$3C000C
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|Invalid
|Invalid
|Interrupt Acknowledge.
|Interrupt Acknowledge.
{{8BitRegister|?|5|Ack VBlank|1|Ack HBlank|1|Ack IRQ3|1}}
{{8BitRegister|-|5|Ack VBlank|1|Ack HBlank|1|Ack IRQ3|1}}
|-
|-
|$3C000E
|$3C000E
$3C000F
|REG_TIMERSTOP
|?
|Word
|?
|Bit 0=1: Stop timer counter for 32 raster lines when in PAL mode
| colspan="2" |Some emulators treat these locations like $3C000A.
|}
|}


Revision as of 15:45, 27 June 2011

Note: Most of the register names come from neogeo_spex.pdf

I/O registers

Always read/written as bytes (?)

Address Name Read Write Handled by
$300000 REG_P1CNT Player 1 controls (active low)
Bit 7 6 5 4 3 2 1 0
Def D CBARightLeftDownUp
? NEO-C1
$300001 REG_DIPSW Dipswitches (active low)
Bit 7 6 5 4 3 2 1 0
Def Freeze FreeplayMultiplayer configurationController mode (normal or mahjong)Coin mode (normal or versus)Test mode
Kick watchdog NEO-F0 (read)
$300081 ? Read only ? ?
$320000 REG_SOUND Send command to Z80 Read Z80 reply code NEO-D0 ?
$320001 REG_STATUS_A
Bit 7 6 5 4 3 2 1 0
Def NEC D4990 data bit NEC D4990 time pulse?ServiceCoin 2Coin 1
? ?
$340000 REG_P2CNT Player 2 controls (active low)
Bit 7 6 5 4 3 2 1 0
Def D CBARightLeftDownUp
? NEO-C1
$380000 REG_STATUS_B
Bit 7 6 5 4 3 2 1 0
Def 0:AES
1:MVS		 Memory card
write enabled (0)		Memory card
inserted (0)		Select P2Start P2Select P1Start P1
? NEO-C1
$380001 REG_POUTPUT ? Joypad ports outputs
Bit 7 6 5 4 3 2 1 0
Def ? P2 outputsP1 outputs

MAME select_controller

NEO-D0
$380011 REG_CRDBANK ? Memory card bank selection (bits 0~2) NEO-D0
$380021 REG_SLOT ?
Bit 7 6 5 4 3 2 1 0
Def ? Slot #
NEO-F0?
$380030(1?) ? ? MAME set_output_latch (LED marquee ?) NEO-F0?
$380040(1?) ? ? MAME set_output_data (LED marquee ?) NEO-F0?
$380050(1?) ? ? MAME upd4990a_control_16_w (Calendar) NEO-F0?
$380061 ? ? Base address for writes (used by the MVS BIOS) ?
$380065 ? ? Write only (used by the MVS BIOS) ?
$380067 ? ? Write only (used by the MVS BIOS) ?
$3800E1 ? ? Write only (used by the MVS BIOS) ?

System registers

Handled by a 74HC259 adressable latch on cart systems. Byte writes only.

Address Name Write
$3A0001 REG_NOSHADOW Normal video output
$3A0011 REG_SHADOW Darken video output
$3A0003 REG_SWPBIOS Use the BIOS vector table
$3A0013 REG_SWPROM Use the cart's vector table
$3A0005 REG_CRDUNLOCK1 Enable writes to memory card (use REG_CRDUNLOCK2 too)
$3A0015 REG_CRDLOCK1 Disable writes to memory card
$3A0007 REG_CRDLOCK2 Disable writes to memory card
$3A0017 REG_CRDUNLOCK2 Enable writes to memory card (use REG_CRDUNLOCK1 too)
$3A0009 REG_CRDREGSEL Enable "Register select" for memory card
$3A0019 REG_CRDNORMAL DIsable "Register select" for memory card
$3A000B REG_BRDFIX Use the embedded SFIX and SM1 ROM
$3A001B REG_CRTFIX Use the cart's S ROM and M ROM
$3A000D REG_SRAMLOCK Write-protects SRAM (MVS)
$3A001D REG_SRAMULOCK Unprotects SRAM (MVS)
$3A000F REG_PALBANK1 Use palette bank 1
$3A001F REG_PALBANK0 Use palette bank 0

Video registers

Handled by the GPUs.

Address Name Size Read Write
$3C0000 REG_VRAMADDR Word Read VRAM (address isn't changed) Sets VRAM address
$3C0002 REG_VRAMRW Word Read VRAM (address isn't changed) Write VRAM
$3C0004 REG_VRAMMOD Word Reads VRAM address modulo Sets VRAM address modulo (signed)
$3C0006 REG_LSPCMODE Word
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def Raster line counter.
See Display timing		 -1:50Hz
0:60Hz (LSPC2 only)		Auto animation counter
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def Auto animation speed
(in frames)		 Timer interrupt
mode		Timer interrupt enableDisable auto animation?
$3C0008 REG_TIMERHIGH Word Invalid MSBs of timer reload value.
$3C000A REG_TIMERLOW Word Invalid LSBs of timer reload value.
$3C000C REG_IRQACK Byte Invalid Interrupt Acknowledge.
Bit 7 6 5 4 3 2 1 0
Def - Ack VBlankAck HBlankAck IRQ3
$3C000E REG_TIMERSTOP Word Bit 0=1: Stop timer counter for 32 raster lines when in PAL mode


NeoGeo CD registers

NEO-MGA / LC8953 / LC98000 ?

Address Name Size Read Write Handled by
$FF0002 ? Word ? NeoRaine load_files ?
$FF0004 ? Word ? CDM3-2 BIOS writes 0,1,3,7 ?
$FF000E ? Byte ? CDM3-2 BIOS writes $3F,$3C ?
$FF000F ? Byte ? CDM3-2 BIOS writes $20,$10,$08,$04 ?
$FF0011 ? Byte ? CDM3-2 BIOS writes $FE ?
$FF0017 ? Byte CDM3-2 BIOS read/writes bit 0 ?
$FF0061 ? Byte ? Bit4: Run microcode ? LC8953
$FF0064~$FF0070 ? (Long)words ? Registers used by microcode (NeoRaine upload_param)
$FF007E~$FF008F ? Words ? Microcode (16x9bit instructions ?)
$FF0101 ? Byte ? CDM3-2 BIOS writes low nibble ?
$FF0103 ? Byte CDM3-2 BIOS: sequential read/writes ?
$FF0105 ? Byte ? upload_type_w ?
$FF0108 ? Word ? CDM3-2 BIOS writes $5555 ?
$FF010C ? Word ? CDM3-2 BIOS writes $5555 and reads ?
$FF0111 REG_DISBLSPR Byte ? Disable/enable sprites ? NEO-GRC/NEO-OFC
$FF0115 REG_DISBLFIX Byte ? Disable/enable fix layer ?
$FF0119 REG_ENVIDEO Byte ? Enable/disable video output ? (disable works)
$FF011C REG_CDCONFIG Word
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def 1 0CD lid switchConfiguration jumpers?
No effect NEO-CDD board
$FF0121 REG_UPMAPSPR Byte ? Set upload zone to SPR DRAM ?
$FF0123 REG_UPMAPPCM Set upload zone to PCM DRAM
$FF0127 REG_UPMAPZ80 Set upload zone to Z80 DRAM
$FF0129 REG_UPMAPFIX Set upload zone to FIX DRAM
$FF0141 REG_UPUNMAPSPR Unset SPR DRAM to upload zone
$FF0143 REG_UPUNMAPPCM Unset PCM DRAM to upload zone
$FF0147 REG_UPUNMAPZ80 Unset Z80 DRAM to upload zone
$FF0149 REG_UPUNMAPFIX Unset FIX DRAM to upload zone
$FF016F REG_DISBLIRQ Byte ? Disable/enable interrupts ?
$FF0183 REG_ENZ80 Byte ? Enable/disable(reset) Z80 ?
$FF0188 REG_CDDALEFTL Word See Reading CDDA sound levels No effect NEO-MGA
$FF018A REG_CDDARIGHTL
$FF01A1 ? Byte ? Upload zone 1MiB SPR DRAM bank selection ?
$FF01A3 ? Byte ? Upload zone 1MiB PCM DRAM bank selection ?
$FF01A7 ? Byte ? CDM3-2 BIOS writes ?
$FF01FC ? Word ? CDDA control ? ?
$FF01FE ? Word ? CD DA/data switch ? ?
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