Memory mapped registers: Difference between revisions

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|$300001
|$300001
|REG_DIPSW
|REG_DIPSW
|[[Hardware DIPs]] (active low)
|Dipswitches (active low)
{{8BitRegister|Freeze|1|Freeplay|1|Enable [[multiplayer]] communication|1|Communication identification code|2|0:Normal controllers<br>1:Mahjong)|1|0:One coin chute<br>1:Two coin chutes|1|Settings mode|1}}
{{8BitRegister|Freeze|1|Freeplay|1|[[Multiplayer]] configuration|3|Controller mode (normal or mahjong)|1|Coin mode (normal or versus)|1|Test mode|1}}
|Kick watchdog
|Kick watchdog
|[[NEO-F0]] (read)
|[[NEO-F0]] (read)
|-
|-
|$300081
|$300081
|REG_TESTSW
|{{8BitRegister|Test switch (enter menu)|1|Jumper: Board has 2 slots, 0 on 1FZ|1|?|6}}
|?
|?
|[[NEO-F0]]
|Read only
|?
|?
|-
|-
|$320000
|$320000
|REG_SOUND
|REG_SOUND
|[[68k/Z80 communication|Read Z80 reply code]]
|[[68k/Z80 communication|Send command to Z80]]
|Send command to Z80
|Read Z80 reply code
||[[NEO-D0]] ?
||[[NEO-D0]] ?
|-
|-
|$320001
|$320001
|REG_STATUS_A  
|REG_STATUS_A  
|Switch inputs are active low
|{{8BitRegister|NEC D4990 data bit|1|NEC D4990 time pulse|1|?|3|Service|1|Coin 2|1|Coin 1|1}}
{{8BitRegister|D4990 data bit|1|D4990 time pulse|1|Jumper "Type", 1 on 1FZ|1|1 on 1FZ|2|Service|1|Coin 2|1|Coin 1|1}}
|?
|?
|?
|[[NEO-F0]]
|-
|-
|$340000
|$340000
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|$380000
|$380000
|REG_STATUS_B
|REG_STATUS_B
|Aux inputs (active low)
|{{8BitRegister|?|1|[[Memory card]]<br>write protect|2|Memory card<br>inserted|1|Select P2|1|Start P2|1|Select P1|1|Start P1|1|}}
{{8BitRegister|0:MVS<br>1:AES|1|[[Memory card]] write enabled|2|Memory card inserted|1|Select P2|1|Start P2|1|Select P1|1|Start P1|1|}}
|?
|?
|[[NEO-C1]]
|[[NEO-C1]]
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|Joypad ports [[Pinouts#joypad ports|outputs]]
|Joypad ports [[Pinouts#joypad ports|outputs]]
{{8BitRegister|?|2|P2 outputs|3|P1 outputs|3}}
{{8BitRegister|?|2|P2 outputs|3|P1 outputs|3}}
MAME select_controller
|[[NEO-D0]]
|[[NEO-D0]]
|-
|-
|$380011
|$380011
|REG_CRDBANK
|?
|?
|{{8BitRegister| |5|Memory card bank selection|3}}
|?
|[[NEO-D0]]
|Write only, after a write to $3A0019
|?
|-
|-
|$380021
|$380021
|REG_SLOT
|REG_SLOT
|?
|?
|{{8BitRegister|?|5|Slot #|3}}
|{{8BitRegister|?|5|Slot #|3|}}
|[[NEO-F0]]?
|[[NEO-F0]]?
|-
|-
|$380031
|$380030(1?)
|REG_LEDLATCHES
|?
|?
|?
|MAME set_output_latch {{8BitRegister|?|2|Latch LED2 data|1|Latch LED1 data|1|Latch EL panel data|1|?|3}}
|MAME set_output_latch (LED marquee ?)
Data is latched on falling edge (1 to 0 transition)
|[[NEO-F0]]?
|[[NEO-F0]]?
|-
|-
|$380041
|$380040(1?)
|REG_LEDDATA
|?
|?
|?
|MAME set_output_data (for LEDs and EL panel)
|MAME set_output_data (LED marquee ?)
|[[NEO-F0]]?
|[[NEO-F0]]?
|-
|-
|$380051
|$380050(1?)
|REG_RTCCTRL
|?
|?
|?
|MAME upd4990a_control_16_w ([[Calendar]]){{8BitRegister|?|5|D4990 Strobe ?|1|D4990 Clock ?|1|D4990 DIN ?|1|}}
|MAME upd4990a_control_16_w ([[Calendar]])
|[[NEO-F0]]?
|[[NEO-F0]]?
|-
|-
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|?
|?
|?
|?
|Base address for writes (used by the MVS BIOS, only bit 4) Coin counters reset ?
|Base address for writes (used by the MVS BIOS)
|[[NEO-I0]]
|-
|$380063
|?
|?
|?
|Write only (used by the MVS BIOS) Coin counters reset ?
|[[NEO-I0]]
|-
|-
|$380065
|$380065
|?
|?
|?
|?
|Write only (used by the MVS BIOS) Coin lockout ?
|Write only (used by the MVS BIOS)
|[[NEO-I0]]
|?
|-
|-
|$380067
|$380067
|?
|?
|?
|?
|Write only (used by the MVS BIOS) Coin lockout ?
|Write only (used by the MVS BIOS)
|[[NEO-I0]]
|?
|-
|-
|$3800E1
|$3800E1
|?
|?
|?
|?
|Write only (used by the MVS BIOS), similar to $380061
|Write only (used by the MVS BIOS)
|[[NEO-I0]] ?
|?
|}
|}


==System registers==
==System registers==
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|-
|-
|$3A0001
|$3A0001
|REG_NOSHADOW
|REG_DISPENABL
|Normal video output
|Normal video output
|-
|-
|$3A0011
|$3A0011
|REG_SHADOW
|REG_DISPDSABL
|[[Video DAC|Darken]] video output
|[[Video DAC|Darken]] video output
|-
|-
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|-
|-
|$3A0009
|$3A0009
|REG_CRDREGSEL
|?
|Enable "Register select" for memory card
|?
|-
|-
|$3A0019
|$3A0019
|REG_CRDNORMAL
|?
|DIsable "Register select" for memory card
|?
|-
|-
|$3A000B
|$3A000B
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|$3A001B
|$3A001B
|REG_CRTFIX
|REG_CRTFIX
|Use the cart's [[S ROM]] and [[M1 ROM]]
|Use the cart's [[S ROM]] and [[M ROM]]
|-
|-
|$3A000D
|$3A000D
|REG_SRAMLOCK
|REG_SRAMLOCK
|Write-protects [[backup RAM]] (MVS)
|Write-protects [[Battery-backed RAM|SRAM]] (MVS)
|-
|-
|$3A001D
|$3A001D
|REG_SRAMUNLOCK
|REG_SRAMULOCK
|Unprotects backup RAM (MVS)
|Unprotects SRAM (MVS)
|-
|-
|$3A000F
|$3A000F
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|Use palette bank 0
|Use palette bank 0
|}
|}


==Video registers==
==Video registers==
Handled by the [[GPU]]s. Only word access.
Handled by the [[GPU]]s.
{| class="regdef"
{| class="regdef"
|'''Address'''
|'''Address'''
|'''Name'''
|'''Name'''
|'''Size'''
|'''Read'''
|'''Read'''
|'''Write'''
|'''Write'''
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|$3C0000
|$3C0000
|REG_VRAMADDR
|REG_VRAMADDR
|Word
|Read [[VRAM]] (address isn't changed)
|Read [[VRAM]] (address isn't changed)
|Sets VRAM address
|Sets VRAM address
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|$3C0002
|$3C0002
|REG_VRAMRW
|REG_VRAMRW
|Word
|Read VRAM (address isn't changed)
|Read VRAM (address isn't changed)
|Write VRAM
|Write VRAM
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|$3C0004
|$3C0004
|REG_VRAMMOD
|REG_VRAMMOD
|Word
|Reads VRAM address modulo
|Reads VRAM address modulo
|Sets VRAM address modulo (signed)
|Sets VRAM address modulo (signed)
|-
|-
|$3C0006
|$3C0006
|REG_LSPCMODE
|REG_HBLANKCNT
|{{16BitRegister|Raster line counter.<br>See [[Display timing]]|9|-|3|1:50Hz<br>0:60Hz ([[GPU|LSPC2]] only)|1|[[Auto animation]] counter|3}}
|Word
|{{16BitRegister|Auto animation speed<br>(in frames)|8|[[Timer interrupt]]<br>mode|3|Timer interrupt enable|1|Disable auto animation|1|?|3}}
|{{16BitRegister|Raster line counter.<br>See [[Display timing]]|9|?|3|1:50Hz<br>0:60Hz|1|[[Auto animation]] counter|3}}
|{{16BitRegister|Auto animation speed<br>(in frames)|8|Raster interrupt<br>mode|3|Raster interrupt<br>enable|1|Disable auto animation|1|?|3}}
|-
|-
|$3C0008
|$3C0008
|REG_TIMERHIGH
|REG_HBLANKPOS
|Word
|Invalid
|Invalid
|MSBs of timer reload value.
|MSB of [[68k interrupts|RLI]] position (number of pixels)
|-
|-
|$3C000A
|$3C000A
|REG_TIMERLOW
|?
|Word
|Invalid
|Invalid
|LSBs of timer reload value.
|LSB of RLI position (number of pixels)
|-
|-
|$3C000C
|$3C000C
|REG_IRQACK
|REG_IRQACK
|Byte
|Invalid
|Invalid
|Interrupt Acknowledge.
|Interrupt Acknowledge.
{{8BitRegister|-|5|Ack VBlank|1|Ack HBlank|1|Ack IRQ3|1}}
{{8BitRegister|?|5|Ack VBlank|1|Ack HBlank|1|Ack IRQ3|1}}
|-
|-
|$3C000E
|$3C000E
|REG_TIMERSTOP
$3C000F
|Invalid
|?
|Bit 0=1: Stop timer counter for 32 raster lines when in PAL mode
|?
| colspan="2" |Some emulators treat these locations like $3C000A.
|}
|}


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|Byte
|Byte
|?
|?
|Disable/enable sprites ?
|Disable/enable sprites
|rowspan="3"|[[NEO-GRC]]/[[NEO-OFC]]
|rowspan="3"|[[NEO-GRC]]/[[NEO-OFC]]
|-
|-
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|Byte
|Byte
|?
|?
|Disable/enable fix layer ?
|Disable/enable fix layer
|-
|-
|$FF0119
|$FF0119
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|Byte
|Byte
|?
|?
|Enable/disable video output ? (disable works)
|Enable/disable video output
|-
|-
|$FF011C
|$FF011C
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|Word
|Word
|{{16BitRegister|1|2|0|1|CD lid switch|1|Configuration jumpers|4|?|8}}
|{{16BitRegister|1|2|0|1|CD lid switch|1|Configuration jumpers|4|?|8}}
|No effect
|?
|[[NEO-CDD boards|NEO-CDD board]]
|[[NEO-CDD boards|NEO-CDD board]]
|-
|-
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|rowspan="2"|Word
|rowspan="2"|Word
|rowspan="2"|See [[Reading CDDA sound levels]]
|rowspan="2"|See [[Reading CDDA sound levels]]
|rowspan="2"|No effect
|rowspan="2"|?
|rowspan="2"|[[NEO-MGA]]
|rowspan="2"|[[NEO-MGA]]
|-
|-

Revision as of 20:51, 7 November 2011

Note: Most of the register names come from neogeo_spex.pdf

I/O registers

Always read/written as bytes (?)

Address Name Read Write Handled by
$300000 REG_P1CNT Player 1 controls (active low)
Bit 7 6 5 4 3 2 1 0
Def D CBARightLeftDownUp
? NEO-C1
$300001 REG_DIPSW Dipswitches (active low)
Bit 7 6 5 4 3 2 1 0
Def Freeze FreeplayMultiplayer configurationController mode (normal or mahjong)Coin mode (normal or versus)Test mode
Kick watchdog NEO-F0 (read)
$300081 ? Read only ? ?
$320000 REG_SOUND Send command to Z80 Read Z80 reply code NEO-D0 ?
$320001 REG_STATUS_A
Bit 7 6 5 4 3 2 1 0
Def NEC D4990 data bit NEC D4990 time pulse?ServiceCoin 2Coin 1
? ?
$340000 REG_P2CNT Player 2 controls (active low)
Bit 7 6 5 4 3 2 1 0
Def D CBARightLeftDownUp
? NEO-C1
$380000 REG_STATUS_B
Bit 7 6 5 4 3 2 1 0
Def ? Memory card
write protect		Memory card
inserted		Select P2Start P2Select P1Start P1
? NEO-C1
$380001 REG_POUTPUT ? Joypad ports outputs
Bit 7 6 5 4 3 2 1 0
Def ? P2 outputsP1 outputs

MAME select_controller

NEO-D0
$380011 ? ? Write only, after a write to $3A0019 ?
$380021 REG_SLOT ?
Bit 7 6 5 4 3 2 1 0
Def ? Slot #
NEO-F0?
$380030(1?) ? ? MAME set_output_latch (LED marquee ?) NEO-F0?
$380040(1?) ? ? MAME set_output_data (LED marquee ?) NEO-F0?
$380050(1?) ? ? MAME upd4990a_control_16_w (Calendar) NEO-F0?
$380061 ? ? Base address for writes (used by the MVS BIOS) ?
$380065 ? ? Write only (used by the MVS BIOS) ?
$380067 ? ? Write only (used by the MVS BIOS) ?
$3800E1 ? ? Write only (used by the MVS BIOS) ?

System registers

Handled by a 74HC259 adressable latch on cart systems. Byte writes only.

Address Name Write
$3A0001 REG_DISPENABL Normal video output
$3A0011 REG_DISPDSABL Darken video output
$3A0003 REG_SWPBIOS Use the BIOS vector table
$3A0013 REG_SWPROM Use the cart's vector table
$3A0005 REG_CRDUNLOCK1 Enable writes to memory card (use REG_CRDUNLOCK2 too)
$3A0015 REG_CRDLOCK1 Disable writes to memory card
$3A0007 REG_CRDLOCK2 Disable writes to memory card
$3A0017 REG_CRDUNLOCK2 Enable writes to memory card (use REG_CRDUNLOCK1 too)
$3A0009 ? ?
$3A0019 ? ?
$3A000B REG_BRDFIX Use the embedded SFIX and SM1 ROM
$3A001B REG_CRTFIX Use the cart's S ROM and M ROM
$3A000D REG_SRAMLOCK Write-protects SRAM (MVS)
$3A001D REG_SRAMULOCK Unprotects SRAM (MVS)
$3A000F REG_PALBANK1 Use palette bank 1
$3A001F REG_PALBANK0 Use palette bank 0

Video registers

Handled by the GPUs.

Address Name Size Read Write
$3C0000 REG_VRAMADDR Word Read VRAM (address isn't changed) Sets VRAM address
$3C0002 REG_VRAMRW Word Read VRAM (address isn't changed) Write VRAM
$3C0004 REG_VRAMMOD Word Reads VRAM address modulo Sets VRAM address modulo (signed)
$3C0006 REG_HBLANKCNT Word
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def Raster line counter.
See Display timing		 ?1:50Hz
0:60Hz		Auto animation counter
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def Auto animation speed
(in frames)		 Raster interrupt
mode		Raster interrupt
enable		Disable auto animation?
$3C0008 REG_HBLANKPOS Word Invalid MSB of RLI position (number of pixels)
$3C000A ? Word Invalid LSB of RLI position (number of pixels)
$3C000C REG_IRQACK Byte Invalid Interrupt Acknowledge.
Bit 7 6 5 4 3 2 1 0
Def ? Ack VBlankAck HBlankAck IRQ3
$3C000E

$3C000F

? ? Some emulators treat these locations like $3C000A.


NeoGeo CD registers

NEO-MGA / LC8953 / LC98000 ?

Address Name Size Read Write Handled by
$FF0002 ? Word ? NeoRaine load_files ?
$FF0004 ? Word ? CDM3-2 BIOS writes 0,1,3,7 ?
$FF000E ? Byte ? CDM3-2 BIOS writes $3F,$3C ?
$FF000F ? Byte ? CDM3-2 BIOS writes $20,$10,$08,$04 ?
$FF0011 ? Byte ? CDM3-2 BIOS writes $FE ?
$FF0017 ? Byte CDM3-2 BIOS read/writes bit 0 ?
$FF0061 ? Byte ? Bit4: Run microcode ? LC8953
$FF0064~$FF0070 ? (Long)words ? Registers used by microcode (NeoRaine upload_param)
$FF007E~$FF008F ? Words ? Microcode (16x9bit instructions ?)
$FF0101 ? Byte ? CDM3-2 BIOS writes low nibble ?
$FF0103 ? Byte CDM3-2 BIOS: sequential read/writes ?
$FF0105 ? Byte ? upload_type_w ?
$FF0108 ? Word ? CDM3-2 BIOS writes $5555 ?
$FF010C ? Word ? CDM3-2 BIOS writes $5555 and reads ?
$FF0111 REG_DISBLSPR Byte ? Disable/enable sprites NEO-GRC/NEO-OFC
$FF0115 REG_DISBLFIX Byte ? Disable/enable fix layer
$FF0119 REG_ENVIDEO Byte ? Enable/disable video output
$FF011C REG_CDCONFIG Word
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def 1 0CD lid switchConfiguration jumpers?
? NEO-CDD board
$FF0121 REG_UPMAPSPR Byte ? Set upload zone to SPR DRAM ?
$FF0123 REG_UPMAPPCM Set upload zone to PCM DRAM
$FF0127 REG_UPMAPZ80 Set upload zone to Z80 DRAM
$FF0129 REG_UPMAPFIX Set upload zone to FIX DRAM
$FF0141 REG_UPUNMAPSPR Unset SPR DRAM to upload zone
$FF0143 REG_UPUNMAPPCM Unset PCM DRAM to upload zone
$FF0147 REG_UPUNMAPZ80 Unset Z80 DRAM to upload zone
$FF0149 REG_UPUNMAPFIX Unset FIX DRAM to upload zone
$FF016F REG_DISBLIRQ Byte ? Disable/enable interrupts ?
$FF0183 REG_ENZ80 Byte ? Enable/disable(reset) Z80 ?
$FF0188 REG_CDDALEFTL Word See Reading CDDA sound levels ? NEO-MGA
$FF018A REG_CDDARIGHTL
$FF01A1 ? Byte ? Upload zone 1MiB SPR DRAM bank selection ?
$FF01A3 ? Byte ? Upload zone 1MiB PCM DRAM bank selection ?
$FF01A7 ? Byte ? CDM3-2 BIOS writes ?
$FF01FC ? Word ? CDDA control ? ?
$FF01FE ? Word ? CD DA/data switch ? ?
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