Note: Most of the register names come from neogeo_spex.pdf
I/O registers
Always read/written as bytes (?)
Address
|
Name
|
Read
|
Write
|
Handled by
|
$300000
|
REG_P1CNT
|
Player 1 controls (active low)
Bit |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Def |
D |
C | B | A | Right | Left | Down | Up |
|
?
|
NEO-C1
|
$300001
|
REG_DIPSW
|
Hardware DIPs (active low)
Bit |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Def |
Freeze |
Freeplay | Enable multiplayer communication | Communication identification code | 0:Normal controllers 1:Mahjong) | 0:One coin chute 1:Two coin chutes | Settings mode |
|
Kick watchdog
|
NEO-F0 (read)
|
$300081
|
REG_TESTSW
|
Bit |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Def |
Test switch (enter menu) |
Jumper: Board has 2 slots, 0 on 1FZ | ? |
|
?
|
NEO-F0
|
$320000
|
REG_SOUND
|
Read Z80 reply code
|
Send command to Z80
|
NEO-D0 ?
|
$320001
|
REG_STATUS_A
|
Switch inputs are active low
Bit |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Def |
D4990 data bit |
D4990 time pulse | Jumper "Type", 1 on 1FZ | 1 on 1FZ | Service | Coin 2 | Coin 1 |
|
?
|
NEO-F0
|
$340000
|
REG_P2CNT
|
Player 2 controls (active low)
Bit |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Def |
D |
C | B | A | Right | Left | Down | Up |
|
?
|
NEO-C1
|
$380000
|
REG_STATUS_B
|
Aux inputs (active low)
Bit |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Def |
0:AES 1:MVS |
Memory card write enabled | Memory card inserted | Select P2 | Start P2 | Select P1 | Start P1 |
|
?
|
NEO-C1
|
$380001
|
REG_POUTPUT
|
?
|
Joypad ports outputs
Bit |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Def |
? |
P2 outputs | P1 outputs |
|
NEO-D0
|
$380011
|
REG_CRDBANK
|
?
|
Bit |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Def |
|
Memory card bank selection |
|
NEO-D0
|
$380021
|
REG_SLOT
|
?
|
Bit |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Def |
? |
Slot # |
|
NEO-F0?
|
$380031
|
REG_LEDLATCHES
|
?
|
Bit |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Def |
? |
Latch LED2 data | Latch LED1 data | Latch EL panel data | ? |
MAME set_output_latch
|
NEO-F0?
|
$380041
|
REG_LEDDATA
|
?
|
MAME set_output_data (for LEDs and EL panel)
|
NEO-F0?
|
$380051
|
REG_RTCCTRL
|
?
|
MAME upd4990a_control_16_w (Calendar)
Bit |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Def |
? |
D4990 Strobe ? | D4990 Clock ? | D4990 DIN ? |
|
NEO-F0?
|
$380061
|
?
|
?
|
Base address for writes (used by the MVS BIOS, only bit 4) Coin counters reset ?
|
NEO-I0
|
$380063
|
?
|
?
|
Write only (used by the MVS BIOS) Coin counters reset ?
|
NEO-I0
|
$380065
|
?
|
?
|
Write only (used by the MVS BIOS) Coin lockout ?
|
NEO-I0
|
$380067
|
?
|
?
|
Write only (used by the MVS BIOS) Coin lockout ?
|
NEO-I0
|
$3800E1
|
?
|
?
|
Write only (used by the MVS BIOS), similar to $380061
|
NEO-I0 ?
|
System registers
Handled by a 74HC259 adressable latch on cart systems. Byte writes only.
Address
|
Name
|
Write
|
$3A0001
|
REG_NOSHADOW
|
Normal video output
|
$3A0011
|
REG_SHADOW
|
Darken video output
|
$3A0003
|
REG_SWPBIOS
|
Use the BIOS vector table
|
$3A0013
|
REG_SWPROM
|
Use the cart's vector table
|
$3A0005
|
REG_CRDUNLOCK1
|
Enable writes to memory card (use REG_CRDUNLOCK2 too)
|
$3A0015
|
REG_CRDLOCK1
|
Disable writes to memory card
|
$3A0007
|
REG_CRDLOCK2
|
Disable writes to memory card
|
$3A0017
|
REG_CRDUNLOCK2
|
Enable writes to memory card (use REG_CRDUNLOCK1 too)
|
$3A0009
|
REG_CRDREGSEL
|
Enable "Register select" for memory card
|
$3A0019
|
REG_CRDNORMAL
|
DIsable "Register select" for memory card
|
$3A000B
|
REG_BRDFIX
|
Use the embedded SFIX and SM1 ROM
|
$3A001B
|
REG_CRTFIX
|
Use the cart's S ROM and M1 ROM
|
$3A000D
|
REG_SRAMLOCK
|
Write-protects SRAM (MVS)
|
$3A001D
|
REG_SRAMULOCK
|
Unprotects SRAM (MVS)
|
$3A000F
|
REG_PALBANK1
|
Use palette bank 1
|
$3A001F
|
REG_PALBANK0
|
Use palette bank 0
|
Video registers
Handled by the GPUs. Only word access.
Address
|
Name
|
Read
|
Write
|
$3C0000
|
REG_VRAMADDR
|
Read VRAM (address isn't changed)
|
Sets VRAM address
|
$3C0002
|
REG_VRAMRW
|
Read VRAM (address isn't changed)
|
Write VRAM
|
$3C0004
|
REG_VRAMMOD
|
Reads VRAM address modulo
|
Sets VRAM address modulo (signed)
|
$3C0006
|
REG_LSPCMODE
|
|
Bit |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Def |
Auto animation speed (in frames) |
Timer interrupt mode | Timer interrupt enable | Disable auto animation | ? |
|
$3C0008
|
REG_TIMERHIGH
|
Invalid
|
MSBs of timer reload value.
|
$3C000A
|
REG_TIMERLOW
|
Invalid
|
LSBs of timer reload value.
|
$3C000C
|
REG_IRQACK
|
Invalid
|
Interrupt Acknowledge.
Bit |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Def |
- |
Ack VBlank | Ack HBlank | Ack IRQ3 |
|
$3C000E
|
REG_TIMERSTOP
|
Invalid
|
Bit 0=1: Stop timer counter for 32 raster lines when in PAL mode
|
NeoGeo CD registers
NEO-MGA / LC8953 / LC98000 ?
Address
|
Name
|
Size
|
Read
|
Write
|
Handled by
|
$FF0002
|
?
|
Word
|
?
|
NeoRaine load_files
|
?
|
$FF0004
|
?
|
Word
|
?
|
CDM3-2 BIOS writes 0,1,3,7
|
?
|
$FF000E
|
?
|
Byte
|
?
|
CDM3-2 BIOS writes $3F,$3C
|
?
|
$FF000F
|
?
|
Byte
|
?
|
CDM3-2 BIOS writes $20,$10,$08,$04
|
?
|
$FF0011
|
?
|
Byte
|
?
|
CDM3-2 BIOS writes $FE
|
?
|
$FF0017
|
?
|
Byte
|
CDM3-2 BIOS read/writes bit 0
|
?
|
$FF0061
|
?
|
Byte
|
?
|
Bit4: Run microcode ?
|
LC8953
|
$FF0064~$FF0070
|
?
|
(Long)words
|
?
|
Registers used by microcode (NeoRaine upload_param)
|
$FF007E~$FF008F
|
?
|
Words
|
?
|
Microcode (16x9bit instructions ?)
|
$FF0101
|
?
|
Byte
|
?
|
CDM3-2 BIOS writes low nibble
|
?
|
$FF0103
|
?
|
Byte
|
CDM3-2 BIOS: sequential read/writes
|
?
|
$FF0105
|
?
|
Byte
|
?
|
upload_type_w
|
?
|
$FF0108
|
?
|
Word
|
?
|
CDM3-2 BIOS writes $5555
|
?
|
$FF010C
|
?
|
Word
|
?
|
CDM3-2 BIOS writes $5555 and reads
|
?
|
$FF0111
|
REG_DISBLSPR
|
Byte
|
?
|
Disable/enable sprites ?
|
NEO-GRC/NEO-OFC
|
$FF0115
|
REG_DISBLFIX
|
Byte
|
?
|
Disable/enable fix layer ?
|
$FF0119
|
REG_ENVIDEO
|
Byte
|
?
|
Enable/disable video output ? (disable works)
|
$FF011C
|
REG_CDCONFIG
|
Word
|
Bit |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Def |
1 |
0 | CD lid switch | Configuration jumpers | ? |
|
No effect
|
NEO-CDD board
|
$FF0121
|
REG_UPMAPSPR
|
Byte
|
?
|
Set upload zone to SPR DRAM
|
?
|
$FF0123
|
REG_UPMAPPCM
|
Set upload zone to PCM DRAM
|
$FF0127
|
REG_UPMAPZ80
|
Set upload zone to Z80 DRAM
|
$FF0129
|
REG_UPMAPFIX
|
Set upload zone to FIX DRAM
|
$FF0141
|
REG_UPUNMAPSPR
|
Unset SPR DRAM to upload zone
|
$FF0143
|
REG_UPUNMAPPCM
|
Unset PCM DRAM to upload zone
|
$FF0147
|
REG_UPUNMAPZ80
|
Unset Z80 DRAM to upload zone
|
$FF0149
|
REG_UPUNMAPFIX
|
Unset FIX DRAM to upload zone
|
$FF016F
|
REG_DISBLIRQ
|
Byte
|
?
|
Disable/enable interrupts
|
?
|
$FF0183
|
REG_ENZ80
|
Byte
|
?
|
Enable/disable(reset) Z80
|
?
|
$FF0188
|
REG_CDDALEFTL
|
Word
|
See Reading CDDA sound levels
|
No effect
|
NEO-MGA
|
$FF018A
|
REG_CDDARIGHTL
|
$FF01A1
|
?
|
Byte
|
?
|
Upload zone 1MiB SPR DRAM bank selection
|
?
|
$FF01A3
|
?
|
Byte
|
?
|
Upload zone 1MiB PCM DRAM bank selection
|
?
|
$FF01A7
|
?
|
Byte
|
?
|
CDM3-2 BIOS writes
|
?
|
$FF01FC
|
?
|
Word
|
?
|
CDDA control ?
|
?
|
$FF01FE
|
?
|
Word
|
?
|
CD DA/data switch ?
|
?
|