Memory mapped registers: Difference between revisions

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m (Name changes and a few bits added)
m (Corrections and additionnal infos from MAME source)
Line 20: Line 20:
|$300001
|$300001
|REG_DIPSW
|REG_DIPSW
|Dipswitches (active low)
|[[Hardware DIPs]] (active low)
{{8BitRegister|Freeze|1|Freeplay|1|[[Multiplayer]] configuration|3|Controller mode (normal or mahjong)|1|Coin mode (normal or versus)|1|Test mode|1}}
{{8BitRegister|Freeze|1|Freeplay|1|Enable [[multiplayer]] communication|1|Communication identification code|2|0:Normal controllers<br>1:Mahjong)|1|0:One coin chute<br>1:Two coin chutes|1|Settings mode|1}}
|Kick watchdog
|Kick watchdog
|[[NEO-F0]] (read)
|[[NEO-F0]] (read)
Line 27: Line 27:
|$300081
|$300081
|?
|?
|Read only
|{{8BitRegister|MAME "Enter BIOS"|1|MVS slot number detection 1 ?|1|?|6}}
|?
|?
|?
|?
Line 39: Line 39:
|$320001
|$320001
|REG_STATUS_A  
|REG_STATUS_A  
|{{8BitRegister|NEC D4990 data bit|1|NEC D4990 time pulse|1|?|3|Service|1|Coin 2|1|Coin 1|1}}
|Switch inputs are active low
|?
{{8BitRegister|NEC D4990 data bit|1|NEC D4990 time pulse|1|MVS slot number detection 2 ?|1|?|2|Service|1|Coin 2|1|Coin 1|1}}
|?
|?
|[[NEO-F0]]
|-
|-
|$340000
|$340000
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|$380000
|$380000
|REG_STATUS_B
|REG_STATUS_B
|{{8BitRegister|0:AES<br>1:MVS|1|[[Memory card]]<br>write enabled (0)|2|Memory card<br>inserted (0)|1|Select P2|1|Start P2|1|Select P1|1|Start P1|1|}}
|Aux inputs (active low)
{{8BitRegister|0:AES<br>1:MVS|1|[[Memory card]] write enabled|2|Memory card inserted|1|Select P2|1|Start P2|1|Select P1|1|Start P1|1|}}
|?
|?
|[[NEO-C1]]
|[[NEO-C1]]
Line 61: Line 63:
|Joypad ports [[Pinouts#joypad ports|outputs]]
|Joypad ports [[Pinouts#joypad ports|outputs]]
{{8BitRegister|?|2|P2 outputs|3|P1 outputs|3}}
{{8BitRegister|?|2|P2 outputs|3|P1 outputs|3}}
MAME select_controller
|[[NEO-D0]]
|[[NEO-D0]]
|-
|-
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|REG_CRDBANK
|REG_CRDBANK
|?
|?
|Memory card bank selection (bits 0~2)
|{{8BitRegister| |5|Memory card bank selection|3}}
|[[NEO-D0]]
|[[NEO-D0]]
|-
|-
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|REG_SLOT
|REG_SLOT
|?
|?
|{{8BitRegister|?|5|Slot #|3|}}
|{{8BitRegister|?|5|Slot #|3}}
|[[NEO-F0]]?
|[[NEO-F0]]?
|-
|-
|$380030(1?)
|$380031
|?
|?
|?
|?
|MAME set_output_latch (LED marquee ?)
|{{8BitRegister|?|2|Latch LED2 data|1|Latch LED1 data|1|Latch EL panel data|1|?|3}}
MAME set_output_latch
|[[NEO-F0]]?
|[[NEO-F0]]?
|-
|-
|$380040(1?)
|$380041
|?
|?
|?
|?
|MAME set_output_data (LED marquee ?)
|MAME set_output_data (for LEDs and EL panel)
|[[NEO-F0]]?
|[[NEO-F0]]?
|-
|-
|$380050(1?)
|$380051
|?
|?
|?
|?
Line 97: Line 99:
|?
|?
|?
|?
|Base address for writes (used by the MVS BIOS)
|Base address for writes (used by the MVS BIOS, only bit 4) Coin counters reset ?
|[[NEO-I0]]
|-
|$380063
|?
|?
|?
|Write only (used by the MVS BIOS) Coin counters reset ?
|[[NEO-I0]]
|-
|-
|$380065
|$380065
|?
|?
|?
|?
|Write only (used by the MVS BIOS)
|Write only (used by the MVS BIOS) Coin lockout ?
|?
|[[NEO-I0]]
|-
|-
|$380067
|$380067
|?
|?
|?
|?
|Write only (used by the MVS BIOS)
|Write only (used by the MVS BIOS) Coin lockout ?
|?
|[[NEO-I0]]
|-
|-
|$3800E1
|$3800E1
|?
|?
|?
|?
|Write only (used by the MVS BIOS)
|Write only (used by the MVS BIOS), similar to $380061
|?
|[[NEO-I0]] ?
|}
|}


==System registers==
==System registers==
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|$3A001B
|$3A001B
|REG_CRTFIX
|REG_CRTFIX
|Use the cart's [[S ROM]] and [[M ROM]]
|Use the cart's [[S ROM]] and [[M1 ROM]]
|-
|-
|$3A000D
|$3A000D
Line 190: Line 199:
|Use palette bank 0
|Use palette bank 0
|}
|}


==Video registers==
==Video registers==
Handled by the [[GPU]]s.
Handled by the [[GPU]]s. Only word access.
{| class="regdef"
{| class="regdef"
|'''Address'''
|'''Address'''
|'''Name'''
|'''Name'''
|'''Size'''
|'''Read'''
|'''Read'''
|'''Write'''
|'''Write'''
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|$3C0000
|$3C0000
|REG_VRAMADDR
|REG_VRAMADDR
|Word
|Read [[VRAM]] (address isn't changed)
|Read [[VRAM]] (address isn't changed)
|Sets VRAM address
|Sets VRAM address
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|$3C0002
|$3C0002
|REG_VRAMRW
|REG_VRAMRW
|Word
|Read VRAM (address isn't changed)
|Read VRAM (address isn't changed)
|Write VRAM
|Write VRAM
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|$3C0004
|$3C0004
|REG_VRAMMOD
|REG_VRAMMOD
|Word
|Reads VRAM address modulo
|Reads VRAM address modulo
|Sets VRAM address modulo (signed)
|Sets VRAM address modulo (signed)
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|$3C0006
|$3C0006
|REG_LSPCMODE
|REG_LSPCMODE
|Word
|{{16BitRegister|Raster line counter.<br>See [[Display timing]]|9|-|3|1:50Hz<br>0:60Hz ([[GPU|LSPC2]] only)|1|[[Auto animation]] counter|3}}
|{{16BitRegister|Raster line counter.<br>See [[Display timing]]|9|-|3|1:50Hz<br>0:60Hz ([[GPU|LSPC2]] only)|1|[[Auto animation]] counter|3}}
|{{16BitRegister|Auto animation speed<br>(in frames)|8|[[Timer interrupt]]<br>mode|3|Timer interrupt enable|1|Disable auto animation|1|?|3}}
|{{16BitRegister|Auto animation speed<br>(in frames)|8|[[Timer interrupt]]<br>mode|3|Timer interrupt enable|1|Disable auto animation|1|?|3}}
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|$3C0008
|$3C0008
|REG_TIMERHIGH  
|REG_TIMERHIGH  
|Word
|Invalid
|Invalid
|MSBs of timer reload value.
|MSBs of timer reload value.
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|$3C000A
|$3C000A
|REG_TIMERLOW
|REG_TIMERLOW
|Word
|Invalid
|Invalid
|LSBs of timer reload value.
|LSBs of timer reload value.
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|$3C000C
|$3C000C
|REG_IRQACK
|REG_IRQACK
|Byte
|Invalid
|Invalid
|Interrupt Acknowledge.
|Interrupt Acknowledge.
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|$3C000E
|$3C000E
|REG_TIMERSTOP
|REG_TIMERSTOP
|Word
|Invalid
|Bit 0=1: Stop timer counter for 32 raster lines when in PAL mode
|Bit 0=1: Stop timer counter for 32 raster lines when in PAL mode
|}
|}

Revision as of 13:11, 28 June 2011

Note: Most of the register names come from neogeo_spex.pdf

I/O registers

Always read/written as bytes (?)

Address Name Read Write Handled by
$300000 REG_P1CNT Player 1 controls (active low)
Bit 7 6 5 4 3 2 1 0
Def D CBARightLeftDownUp
? NEO-C1
$300001 REG_DIPSW Hardware DIPs (active low)
Bit 7 6 5 4 3 2 1 0
Def Freeze FreeplayEnable multiplayer communicationCommunication identification code0:Normal controllers
1:Mahjong)		0:One coin chute
1:Two coin chutes		Settings mode
Kick watchdog NEO-F0 (read)
$300081 ?
Bit 7 6 5 4 3 2 1 0
Def MAME "Enter BIOS" MVS slot number detection 1 ??
? ?
$320000 REG_SOUND Send command to Z80 Read Z80 reply code NEO-D0 ?
$320001 REG_STATUS_A Switch inputs are active low
Bit 7 6 5 4 3 2 1 0
Def NEC D4990 data bit NEC D4990 time pulseMVS slot number detection 2 ??ServiceCoin 2Coin 1
? NEO-F0
$340000 REG_P2CNT Player 2 controls (active low)
Bit 7 6 5 4 3 2 1 0
Def D CBARightLeftDownUp
? NEO-C1
$380000 REG_STATUS_B Aux inputs (active low)
Bit 7 6 5 4 3 2 1 0
Def 0:AES
1:MVS		 Memory card write enabledMemory card insertedSelect P2Start P2Select P1Start P1
? NEO-C1
$380001 REG_POUTPUT ? Joypad ports outputs
Bit 7 6 5 4 3 2 1 0
Def ? P2 outputsP1 outputs
NEO-D0
$380011 REG_CRDBANK ?
Bit 7 6 5 4 3 2 1 0
Def Memory card bank selection
NEO-D0
$380021 REG_SLOT ?
Bit 7 6 5 4 3 2 1 0
Def ? Slot #
NEO-F0?
$380031 ? ?
Bit 7 6 5 4 3 2 1 0
Def ? Latch LED2 dataLatch LED1 dataLatch EL panel data?

MAME set_output_latch

NEO-F0?
$380041 ? ? MAME set_output_data (for LEDs and EL panel) NEO-F0?
$380051 ? ? MAME upd4990a_control_16_w (Calendar) NEO-F0?
$380061 ? ? Base address for writes (used by the MVS BIOS, only bit 4) Coin counters reset ? NEO-I0
$380063 ? ? Write only (used by the MVS BIOS) Coin counters reset ? NEO-I0
$380065 ? ? Write only (used by the MVS BIOS) Coin lockout ? NEO-I0
$380067 ? ? Write only (used by the MVS BIOS) Coin lockout ? NEO-I0
$3800E1 ? ? Write only (used by the MVS BIOS), similar to $380061 NEO-I0 ?


System registers

Handled by a 74HC259 adressable latch on cart systems. Byte writes only.

Address Name Write
$3A0001 REG_NOSHADOW Normal video output
$3A0011 REG_SHADOW Darken video output
$3A0003 REG_SWPBIOS Use the BIOS vector table
$3A0013 REG_SWPROM Use the cart's vector table
$3A0005 REG_CRDUNLOCK1 Enable writes to memory card (use REG_CRDUNLOCK2 too)
$3A0015 REG_CRDLOCK1 Disable writes to memory card
$3A0007 REG_CRDLOCK2 Disable writes to memory card
$3A0017 REG_CRDUNLOCK2 Enable writes to memory card (use REG_CRDUNLOCK1 too)
$3A0009 REG_CRDREGSEL Enable "Register select" for memory card
$3A0019 REG_CRDNORMAL DIsable "Register select" for memory card
$3A000B REG_BRDFIX Use the embedded SFIX and SM1 ROM
$3A001B REG_CRTFIX Use the cart's S ROM and M1 ROM
$3A000D REG_SRAMLOCK Write-protects SRAM (MVS)
$3A001D REG_SRAMULOCK Unprotects SRAM (MVS)
$3A000F REG_PALBANK1 Use palette bank 1
$3A001F REG_PALBANK0 Use palette bank 0


Video registers

Handled by the GPUs. Only word access.

Address Name Read Write
$3C0000 REG_VRAMADDR Read VRAM (address isn't changed) Sets VRAM address
$3C0002 REG_VRAMRW Read VRAM (address isn't changed) Write VRAM
$3C0004 REG_VRAMMOD Reads VRAM address modulo Sets VRAM address modulo (signed)
$3C0006 REG_LSPCMODE
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def Raster line counter.
See Display timing		 -1:50Hz
0:60Hz (LSPC2 only)		Auto animation counter
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def Auto animation speed
(in frames)		 Timer interrupt
mode		Timer interrupt enableDisable auto animation?
$3C0008 REG_TIMERHIGH Invalid MSBs of timer reload value.
$3C000A REG_TIMERLOW Invalid LSBs of timer reload value.
$3C000C REG_IRQACK Invalid Interrupt Acknowledge.
Bit 7 6 5 4 3 2 1 0
Def - Ack VBlankAck HBlankAck IRQ3
$3C000E REG_TIMERSTOP Invalid Bit 0=1: Stop timer counter for 32 raster lines when in PAL mode


NeoGeo CD registers

NEO-MGA / LC8953 / LC98000 ?

Address Name Size Read Write Handled by
$FF0002 ? Word ? NeoRaine load_files ?
$FF0004 ? Word ? CDM3-2 BIOS writes 0,1,3,7 ?
$FF000E ? Byte ? CDM3-2 BIOS writes $3F,$3C ?
$FF000F ? Byte ? CDM3-2 BIOS writes $20,$10,$08,$04 ?
$FF0011 ? Byte ? CDM3-2 BIOS writes $FE ?
$FF0017 ? Byte CDM3-2 BIOS read/writes bit 0 ?
$FF0061 ? Byte ? Bit4: Run microcode ? LC8953
$FF0064~$FF0070 ? (Long)words ? Registers used by microcode (NeoRaine upload_param)
$FF007E~$FF008F ? Words ? Microcode (16x9bit instructions ?)
$FF0101 ? Byte ? CDM3-2 BIOS writes low nibble ?
$FF0103 ? Byte CDM3-2 BIOS: sequential read/writes ?
$FF0105 ? Byte ? upload_type_w ?
$FF0108 ? Word ? CDM3-2 BIOS writes $5555 ?
$FF010C ? Word ? CDM3-2 BIOS writes $5555 and reads ?
$FF0111 REG_DISBLSPR Byte ? Disable/enable sprites ? NEO-GRC/NEO-OFC
$FF0115 REG_DISBLFIX Byte ? Disable/enable fix layer ?
$FF0119 REG_ENVIDEO Byte ? Enable/disable video output ? (disable works)
$FF011C REG_CDCONFIG Word
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def 1 0CD lid switchConfiguration jumpers?
No effect NEO-CDD board
$FF0121 REG_UPMAPSPR Byte ? Set upload zone to SPR DRAM ?
$FF0123 REG_UPMAPPCM Set upload zone to PCM DRAM
$FF0127 REG_UPMAPZ80 Set upload zone to Z80 DRAM
$FF0129 REG_UPMAPFIX Set upload zone to FIX DRAM
$FF0141 REG_UPUNMAPSPR Unset SPR DRAM to upload zone
$FF0143 REG_UPUNMAPPCM Unset PCM DRAM to upload zone
$FF0147 REG_UPUNMAPZ80 Unset Z80 DRAM to upload zone
$FF0149 REG_UPUNMAPFIX Unset FIX DRAM to upload zone
$FF016F REG_DISBLIRQ Byte ? Disable/enable interrupts ?
$FF0183 REG_ENZ80 Byte ? Enable/disable(reset) Z80 ?
$FF0188 REG_CDDALEFTL Word See Reading CDDA sound levels No effect NEO-MGA
$FF018A REG_CDDARIGHTL
$FF01A1 ? Byte ? Upload zone 1MiB SPR DRAM bank selection ?
$FF01A3 ? Byte ? Upload zone 1MiB PCM DRAM bank selection ?
$FF01A7 ? Byte ? CDM3-2 BIOS writes ?
$FF01FC ? Word ? CDDA control ? ?
$FF01FE ? Word ? CD DA/data switch ? ?
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