Schematics: Difference between revisions

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=AES=
=AES (home)=


Big thanks to Wolfsoft and ArcadeTV for the scans.
Big thanks to Wolfsoft and ArcadeTV for the scans.


<gallery widths=256px heights=190px perrow=3>
File:Neogeo_aes_schematics_pal_2-page-001.jpg|Page 1
File:Neogeo_aes_schematics_pal_2-page-002.jpg|Page 2
File:Neogeo_aes_schematics_pal_2-page-003.jpg|Page 3
File:Neogeo_aes_schematics_pal_2-page-004.jpg|Page 4
File:Neogeo_aes_schematics_pal_2-page-005.jpg|Page 5
File:Neogeo_aes_schematics_pal_2-page-006.jpg|Page 6
File:Neogeo_aes_schematics_pal_2-page-007.jpg|Page 7
File:Neogeo_aes_schematics_pal_2-page-008.jpg|Page 8
File:Neogeo_aes_schematics_pal_2-page-009.jpg|Page 9
File:Neogeo_aes_schematics_pal_2-page-010.jpg|Page 10
File:Neogeo_aes_schematics_pal_2-page-011.jpg|Page 11
</gallery>


=MVS=
On page 6: There are two resistors in the bottom left corner that can't be seen due the page fold.
The R48 4.7k is connected to VCC and R49 4.7k is connected to GND.


<span style="color:#FF0000"><B>Beware !</B> There's an error on page 9 (cartridge edge connections): <b>ROMOE/4MB are swapped</B>. ROMOE should be on pin 33 bottom, and 4MB is on pin 34 bottom.</span>
Both resistors are connected to pin3 of U31A.


==Page 1==
[[File:mv1fs-page1.jpg|thumb|Page 1]]
*[[68k]]
*[[System ROM]]
*[[68k RAM]]
*[[Battery-backed RAM]]
*[[NEO-C1]]
*[[joypad]] ports
*[[UPD4990]]
*battery circuit
<br clear=all>


==Page 2==
<gallery widths=300px heights=190px perrow=3>
[[File:mv1fs-page2.jpg|thumb|Page 2]]
File:Neogeo_aes_schematics_pal_2-page-001.jpg|'''Page 1''':{{Chipname|68k}} [[68k user RAM]] {{Chipname|NEO-C1}}
*[[LSPC2-A2]]
File:Neogeo_aes_schematics_pal_2-page-002.jpg|'''Page 2''':{{Chipname|NEO-G0}} [[Palette RAM]] [[Video DAC]]
*[[VRAM]]
File:Neogeo_aes_schematics_pal_2-page-003.jpg|'''Page 3''':{{Chipname|NEO-B1}} [[Reset generator]] [[Joypad]] ports
*[[NEO-I0]]
File:Neogeo_aes_schematics_pal_2-page-004.jpg|'''Page 4''':{{Chipname|LSPC2-A2}} [[L0 ROM]] [[VRAM]]
*[[NEO-B1]]
File:NeoGeo Z80-RAM-NEO-DO.png|'''Page 5''':{{Chipname|Z80}} [[Z80 RAM]] {{Chipname|NEO-D0}} [[:File:Neogeo aes schematics pal 2-page-005.jpg|(original scan)]]
*[[NEO-ZMC2]]
File:Neogeo_aes_schematics_pal_2-page-006.jpg|'''Page 6''':{{Chipname|YM2610}} {{Chipname|YM3016}} {{Chipname|NEO-C1}}
*[[SFIX]]
File:Neogeo_aes_schematics_pal_2-page-007.jpg|'''Page 7''':[[Video encoder]]
*[[LO]]
File:Neogeo_aes_schematics_pal_2-page-008.jpg|'''Page 8''':[[Pinouts|cartridge slot]]
<br clear=all>
File:Neogeo_aes_schematics_pal_2-page-009.jpg|'''Page 9''':[[Memory mapped registers|System latch]] {{Chipname|NEO-E0}} [[Power supply]]
File:Neogeo_aes_schematics_pal_2-page-010.jpg|'''Page 10''':[[Memory card]]
File:Neogeo_aes_schematics_pal_2-page-011.jpg|'''Page 11''':[[Video PLL]]
</gallery>


==Page 3==
=MVS (MV1F)=
[[File:mv1fs-page3.jpg|thumb|Page 3]]
*System register latch
*[[NEO-E0]]
*[[Palette RAM]]
*[[Video DAC]]
<br clear=all>


==Page 4==
<span style="color:#FF0000"><B>Beware !</B> There's an error on page 9 (cartridge edge connections): <b>ROMOE/4MB are swapped</B>. ROMOE should be on pin 33 bottom, and 4MB is on pin 34 bottom.</span>
[[File:mv1fs-page4.jpg|thumb|Page 4]]
*[[Z80]]
*Z80 RAM
*[[SM1]]
*[[NEO-D0]]
*[[YM2610]]
*[[YM3016]]
*[[headphone amp]]
<br clear=all>


==Page 5==
<gallery widths=300px heights=190px perrow=3>
[[File:mv1fs-page5.jpg|thumb|Page 5]]
File:mv1fs-page1.jpg|'''Page 1''':{{Chipname|68k}} [[System ROM]] [[68k user RAM]] [[Battery-backed RAM]] {{Chipname|NEO-C1}} [[Joypad]] ports {{Chipname|UPD4990}} [[Battery circuit]]
*[[speaker amp]]
File:mv1fs-page2.jpg|'''Page 2''':{{Chipname|LSPC2-A2}} [[VRAM]] {{Chipname|NEO-I0}} {{Chipname|NEO-B1}} {{Chipname|NEO-ZMC2}} [[SFIX ROM]] [[L0 ROM]]
*[[NEO-F0]]
File:mv1fs-page3.jpg|'''Page 3''':{{Chipname|NEO-E0}} [[Memory mapped registers|System latch]] [[Palette RAM]] [[Video DAC]]
*[[DIPs|DIP switches]]
File:mv1fs-page4.jpg|'''Page 4''':{{Chipname|Z80}} [[Z80 RAM]] [[SM1]] ROM {{Chipname|NEO-D0}} {{Chipname|YM2610}} {{Chipname|YM3016}} [[Headphone amp]]
*cab outputs
File:mv1fs-page5.jpg|'''Page 5''':[[Power amp]] {{Chipname|NEO-F0}} [[DIPs|DIP switches]] [[Cab interface]]
<br clear=all>
File:mv1fs-page6.jpg|'''Page 6''':Daughterboard connections
File:mv1fs-page7.jpg|'''Page 7'''
File:mv1fs-page8.jpg|'''Page 8''':Daughterboard connections
File:mv1fs-page9.jpg|'''Page 9''':Cartridge connections
</gallery>


==Page 6==
=Peripheral (home/arcade)=
[[File:mv1fs-page6.jpg|thumb|Page 6]]
<gallery widths=300px heights=190px perrow=3>
Daughterboard connections
File:Neo Geo Steering Wheel Schematic.jpg|Steering wheel schematic for Thrash Rally.
<br clear=all>
</gallery>
 
==Page 7==
[[File:mv1fs-page7.jpg|thumb|Page 7]]
<br clear=all>
 
==Page 8==
[[File:mv1fs-page8.jpg|thumb|Page 8]]
Daughterboard connections
<br clear=all>


==Page 9==
[[File:mv1fs-page9.jpg|thumb|Page 9]]
Cartridge connections
<br clear=all>


[[Category:Cartridge systems]]
[[Category:Cartridge systems]]

Revision as of 23:58, 24 September 2023

AES (home)

Big thanks to Wolfsoft and ArcadeTV for the scans.


On page 6: There are two resistors in the bottom left corner that can't be seen due the page fold.

The R48 4.7k is connected to VCC and R49 4.7k is connected to GND.

Both resistors are connected to pin3 of U31A.


MVS (MV1F)

Beware ! There's an error on page 9 (cartridge edge connections): ROMOE/4MB are swapped. ROMOE should be on pin 33 bottom, and 4MB is on pin 34 bottom.

Peripheral (home/arcade)

  • Steering wheel schematic for Thrash Rally.

    Steering wheel schematic for Thrash Rally.


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