Schematics: Difference between revisions

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(Add note about the aes schematics page 6 where the resistors are not clear)
(→‎AES (home): Added re-draw of page 5 schematic, preserved link to original scan)
 
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File:Neogeo_aes_schematics_pal_2-page-003.jpg|'''Page 3''':{{Chipname|NEO-B1}} [[Reset generator]] [[Joypad]] ports
File:Neogeo_aes_schematics_pal_2-page-003.jpg|'''Page 3''':{{Chipname|NEO-B1}} [[Reset generator]] [[Joypad]] ports
File:Neogeo_aes_schematics_pal_2-page-004.jpg|'''Page 4''':{{Chipname|LSPC2-A2}} [[L0 ROM]] [[VRAM]]
File:Neogeo_aes_schematics_pal_2-page-004.jpg|'''Page 4''':{{Chipname|LSPC2-A2}} [[L0 ROM]] [[VRAM]]
File:Neogeo_aes_schematics_pal_2-page-005.jpg|'''Page 5''':{{Chipname|Z80}} [[Z80 RAM]] {{Chipname|NEO-D0}}
File:NeoGeo Z80-RAM-NEO-DO.png|'''Page 5''':{{Chipname|Z80}} [[Z80 RAM]] {{Chipname|NEO-D0}} [[:File:Neogeo aes schematics pal 2-page-005.jpg|(original scan)]]
File:Neogeo_aes_schematics_pal_2-page-006.jpg|'''Page 6''':{{Chipname|YM2610}} {{Chipname|YM3016}} {{Chipname|NEO-C1}}
File:Neogeo_aes_schematics_pal_2-page-006.jpg|'''Page 6''':{{Chipname|YM2610}} {{Chipname|YM3016}} {{Chipname|NEO-C1}}
File:Neogeo_aes_schematics_pal_2-page-007.jpg|'''Page 7''':[[Video encoder]]
File:Neogeo_aes_schematics_pal_2-page-007.jpg|'''Page 7''':[[Video encoder]]

Latest revision as of 23:58, 24 September 2023

AES (home)

Big thanks to Wolfsoft and ArcadeTV for the scans.


On page 6: There are two resistors in the bottom left corner that can't be seen due the page fold.

The R48 4.7k is connected to VCC and R49 4.7k is connected to GND.

Both resistors are connected to pin3 of U31A.


MVS (MV1F)

Beware ! There's an error on page 9 (cartridge edge connections): ROMOE/4MB are swapped. ROMOE should be on pin 33 bottom, and 4MB is on pin 34 bottom.

Peripheral (home/arcade)