Schematics: Difference between revisions
(→AES (home): Added re-draw of page 5 schematic, preserved link to original scan) |
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=AES ( | __TOC__ | ||
=AES (Home system)= | |||
Big thanks to Wolfsoft and ArcadeTV for the scans. | Big thanks to Wolfsoft and ArcadeTV for the scans. | ||
* On page 6: There are two resistors in the bottom left corner that can't be seen due the page fold. | |||
* The R48 4.7k is connected to VCC and R49 4.7k is connected to GND. | |||
* Both resistors are connected to pin3 of U31A. | |||
<gallery widths=300px heights=190px perrow=4> | |||
<gallery widths=300px heights=190px perrow= | |||
File:Neogeo_aes_schematics_pal_2-page-001.jpg|'''Page 1''':{{Chipname|68k}} [[68k user RAM]] {{Chipname|NEO-C1}} | File:Neogeo_aes_schematics_pal_2-page-001.jpg|'''Page 1''':{{Chipname|68k}} [[68k user RAM]] {{Chipname|NEO-C1}} | ||
File:Neogeo_aes_schematics_pal_2-page-002.jpg|'''Page 2''':{{Chipname|NEO-G0}} [[Palette RAM]] [[Video DAC]] | File:Neogeo_aes_schematics_pal_2-page-002.jpg|'''Page 2''':{{Chipname|NEO-G0}} [[Palette RAM]] [[Video DAC]] | ||
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</gallery> | </gallery> | ||
=MVS | =MV1F (MVS)= | ||
<span style="color:#FF0000"><B>Beware !</B> There's an error on page 9 (cartridge edge connections): <b>ROMOE/4MB are swapped</B>. ROMOE should be on pin 33 bottom, and 4MB is on pin 34 bottom.</span> | <span style="color:#FF0000"><B>Beware !</B> There's an error on page 9 (cartridge edge connections): <b>ROMOE/4MB are swapped</B>. ROMOE should be on pin 33 bottom, and 4MB is on pin 34 bottom.</span> | ||
<gallery widths=300px heights=190px perrow= | <gallery widths=300px heights=190px perrow=4> | ||
File:mv1fs-page1.jpg|'''Page 1''':{{Chipname|68k}} [[System ROM]] [[68k user RAM]] [[Battery-backed RAM]] {{Chipname|NEO-C1}} [[Joypad]] ports {{Chipname|UPD4990}} [[Battery circuit]] | File:mv1fs-page1.jpg|'''Page 1''':{{Chipname|68k}} [[System ROM]] [[68k user RAM]] [[Battery-backed RAM]] {{Chipname|NEO-C1}} [[Joypad]] ports {{Chipname|UPD4990}} [[Battery circuit]] | ||
File:mv1fs-page2.jpg|'''Page 2''':{{Chipname|LSPC2-A2}} [[VRAM]] {{Chipname|NEO-I0}} {{Chipname|NEO-B1}} {{Chipname|NEO-ZMC2}} [[SFIX ROM]] [[L0 ROM]] | File:mv1fs-page2.jpg|'''Page 2''':{{Chipname|LSPC2-A2}} [[VRAM]] {{Chipname|NEO-I0}} {{Chipname|NEO-B1}} {{Chipname|NEO-ZMC2}} [[SFIX ROM]] [[L0 ROM]] | ||
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File:mv1fs-page8.jpg|'''Page 8''':Daughterboard connections | File:mv1fs-page8.jpg|'''Page 8''':Daughterboard connections | ||
File:mv1fs-page9.jpg|'''Page 9''':Cartridge connections | File:mv1fs-page9.jpg|'''Page 9''':Cartridge connections | ||
</gallery> | |||
=MV4 (MVS)= | |||
This is the main board of [[MV4|MV4]]. The top board is here after. | |||
PDF file can be found [https://drive.google.com/drive/folders/1QpMv94jbslgKyeiTama89Y3W6AnRzMZS here (GDrive)]. | |||
<gallery widths=300px heights=190px perrow=4> | |||
File:MV-4 Schematics 0 PCB.jpg|'''Page 0''': Component placement | |||
File:MV-4 Schematics 1.jpg|'''Page 1''': todo description | |||
File:MV-4 Schematics 2.jpg|'''Page 2''': todo description | |||
File:MV-4 Schematics 3.jpg|'''Page 3''': todo description | |||
File:MV-4 Schematics 4.jpg|'''Page 4''': todo description | |||
File:MV-4 Schematics 5.jpg|'''Page 5''': todo description | |||
File:MV-4 Schematics 6.jpg|'''Page 6''': todo description | |||
File:MV-4 Schematics 7.jpg|'''Page 7''': todo description | |||
File:MV-4 Schematics 8.jpg|'''Page 8''': todo description | |||
File:MV-4 Schematics 9.jpg|'''Page 9''': todo description | |||
File:MV-4 Schematics 10.jpg|'''Page 10''': todo description | |||
File:MV-4 Schematics 11.jpg|'''Page 11''': todo description | |||
File:MV-4 Schematics 12.jpg|'''Page 12''': todo description | |||
File:MV-4 Schematics 13.jpg|'''Page 13''': todo description | |||
</gallery> | |||
=MV4 Slot4 (MVS)= | |||
This is the top board of [[MV4|MV4]]. | |||
PDF file can be found [https://drive.google.com/drive/folders/1QpMv94jbslgKyeiTama89Y3W6AnRzMZS here (GDrive)]. | |||
<gallery widths=300px heights=190px perrow=4> | |||
File:MV-4 Schematics slot4 0 PCB.jpg|'''Page 0''': Component placement | |||
File:MV-4 Schematics slot4 1.jpg|'''Page 1''': todo description | |||
File:MV-4 Schematics slot4 2.jpg|'''Page 2''': todo description | |||
File:MV-4 Schematics slot4 3.jpg|'''Page 3''': todo description | |||
File:MV-4 Schematics slot4 4.jpg|'''Page 4''': todo description | |||
File:MV-4 Schematics slot4 5.jpg|'''Page 5''': todo description | |||
File:MV-4 Schematics slot4 6.jpg|'''Page 6''': todo description | |||
File:MV-4 Schematics slot4 7.jpg|'''Page 7''': todo description | |||
File:MV-4 Schematics slot4 8.jpg|'''Page 8''': todo description | |||
File:MV-4 Schematics slot4 9.jpg|'''Page 9''': todo description | |||
File:MV-4 Schematics slot4 10.jpg|'''Page 10''': todo description | |||
File:MV-4 Schematics slot4 11.jpg|'''Page 11''': todo description | |||
</gallery> | </gallery> | ||
=Peripheral (home/arcade)= | =Peripheral (home/arcade)= | ||
<gallery widths=300px heights=190px | <gallery widths=300px heights=190px perrow4> | ||
File:Neo Geo Steering Wheel Schematic.jpg|Steering wheel schematic for Thrash Rally. | File:Neo Geo Steering Wheel Schematic.jpg|Steering wheel schematic for Thrash Rally. | ||
</gallery> | </gallery> |
Revision as of 13:08, 23 November 2024
AES (Home system)
Big thanks to Wolfsoft and ArcadeTV for the scans.
- On page 6: There are two resistors in the bottom left corner that can't be seen due the page fold.
- The R48 4.7k is connected to VCC and R49 4.7k is connected to GND.
- Both resistors are connected to pin3 of U31A.
-
Page 1:68k 68k user RAM NEO-C1
-
Page 2:NEO-G0 Palette RAM Video DAC
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Page 3:NEO-B1 Reset generator Joypad ports
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Page 5:Z80 Z80 RAM NEO-D0 (original scan)
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Page 7:Video encoder
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Page 8:cartridge slot
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Page 9:System latch NEO-E0 Power supply
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Page 10:Memory card
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Page 11:Video PLL
MV1F (MVS)
Beware ! There's an error on page 9 (cartridge edge connections): ROMOE/4MB are swapped. ROMOE should be on pin 33 bottom, and 4MB is on pin 34 bottom.
-
Page 1:68k System ROM 68k user RAM Battery-backed RAM NEO-C1 Joypad ports UPD4990 Battery circuit
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Page 3:NEO-E0 System latch Palette RAM Video DAC
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Page 5:Power amp NEO-F0 DIP switches Cab interface
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Page 6:Daughterboard connections
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Page 7
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Page 8:Daughterboard connections
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Page 9:Cartridge connections
MV4 (MVS)
This is the main board of MV4. The top board is here after. PDF file can be found here (GDrive).
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Page 0: Component placement
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Page 1: todo description
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Page 2: todo description
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Page 3: todo description
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Page 4: todo description
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Page 5: todo description
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Page 6: todo description
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Page 7: todo description
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Page 8: todo description
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Page 9: todo description
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Page 10: todo description
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Page 11: todo description
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Page 12: todo description
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Page 13: todo description
MV4 Slot4 (MVS)
This is the top board of MV4. PDF file can be found here (GDrive).
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Page 0: Component placement
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Page 1: todo description
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Page 2: todo description
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Page 3: todo description
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Page 4: todo description
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Page 5: todo description
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Page 6: todo description
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Page 7: todo description
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Page 8: todo description
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Page 9: todo description
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Page 10: todo description
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Page 11: todo description
Peripheral (home/arcade)
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Steering wheel schematic for Thrash Rally.