Category:Chips: Difference between revisions

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*RAMs (VRAM, 68k, Z80)
*RAMs (VRAM, 68k, Z80)
*All SNK CD chips
*All SNK CD chips
=SNK chips, both cart and CD systems=


{| align=center class="regdef"
{| align=center class="regdef"
|rowspan="2"|'''Picture'''
|'''Picture'''
|rowspan="2"|'''Reference'''
|'''Reference'''
|rowspan="2"|'''Description'''
|'''Description'''
|colspan="5"|'''Found in'''
|'''Found in'''
|- style="background-color:AllEEE;"
|'''CD1'''
|'''CD2'''
|'''CDZ'''
|'''Pinout'''
|'''Pinout'''
|-
|[[File:cd2_buf.jpg|x128px|center]]
|[[NEO-BUF]]
|Dual 8-bit bidirectional buffer
|All
|All
|?
|[[File:neo-buf_pinout.png|x128px|center]]
|-
|[[File:brd_grz.jpg|x128px|center]]
|[[NEO-GRZ]]
|Graphics chip
|
|
|?
|
|-
|[[File:brd_ysa2.jpg|x128px|center]]
|[[NEO-YSA2]]
|Audio subsystem chip
|
|
|All
|
|}
=SNK chips, AES/MVS=
{| align=center class="regdef"
|rowspan="2"|'''Picture'''
|rowspan="2"|'''Reference'''
|rowspan="2"|'''Description'''
|colspan="5"|'''Found in'''
|- style="background-color:AllEEE;"
|'''AES'''
|'''MVS'''
|Pinout
|-
|-
|[[File:mvs_lspc-a0.jpg|x128px|center]]
|[[File:mvs_lspc-a0.jpg|x128px|center]]
|[[LSPC-A0]] (QFP160)
|[[LSPC-A0]] (QFP160)
|First generation graphics chip
|First generation [[GPU]]
|Some
|Some AES, some MVS
|Early
|
|
|-
|-
Line 65: Line 21:
|[[LSPC2-A2]]
|[[LSPC2-A2]]
|Second generation graphics chip
|Second generation graphics chip
|Some
|Some AES, some MVS
|Some
|[[File:Lspc2-a2_pinout.png|x128px|center]]
|[[File:Lspc2-a2_pinout.png|x128px|center]]
|-
|-
|[[File:mvs_257.jpg|x128px|center]]
|Need picture
|[[NEO-257]] (QFP64R)
|[[NEO-257]] (QFP64R)
|Quad 74HC257
|Quad 74HC257
|Some MVS
|[[File:neo-257_pinout.png|x128px|center]]
|-
|[[File:crt_273.jpg|x128px|center]]
|[[NEO-273]] (QFP64R)
|C and [[S ROM]] address latch
|
|
|Some
|[[File:neo-273_pinout.png|x128px|center]]
|[[File:neo-257_pinout.png|x128px|center]]
|-
|-
|[[File:aes_b1.jpg|x128px|center]]
|[[File:aes_b1.jpg|x128px|center]]
Line 82: Line 42:
*Line buffers
*Line buffers
*Palette arbiter
*Palette arbiter
|Some
|Some AES, some MVS
|Some
|[[File:neo-b1_pinout.png|x128px|center]]
|[[File:neo-b1_pinout.png|x128px|center]]
|-
|[[File:cd2_buf.jpg|x128px|center]]
|[[NEO-BUF]]
|Dual 8-bit bidirectional buffer
|CD1, CD2
|[[File:neo-buf_pinout.png|x128px|center]]
|-
|-
|[[File:aes_c1.jpg|x128px|center]]
|[[File:aes_c1.jpg|x128px|center]]
Line 91: Line 56:
*Address decoder
*Address decoder
*Joystick inputs
*Joystick inputs
|Some
|Some AES, some MVS
|Some
|[[File:neo-c1_pinout.png|x128px|center]]
|[[File:neo-c1_pinout.png|x128px|center]]
|-
|-
Line 98: Line 62:
|[[NEO-D0]] (QFP64R)
|[[NEO-D0]] (QFP64R)
|Audio subsystem controller
|Audio subsystem controller
|Some
|All AES ?, some MVS
|Some
|[[File:neo-d0_pinout.png|x128px|center]]
|[[File:neo-d0_pinout.png|x128px|center]]
|-
|[[File:crt_cmc.jpg|x128px|center]]
|[[NEO-CMC]]
|
*NEO-273 logic
*NEO-ZMC logic
*C ROM decryption
*C/S ROM multiplexer
*S ROM bankswitching
*M ROM decryption (NEOCMC50 only)
*M ROM bankswitching
|Some cartridges
|[[File:Neocmc_7050_7042_pinout.png|x200px|center]]
|-
|-
|[[File:brd_dcr-t.jpg|x128px|center]]
|[[File:brd_dcr-t.jpg|x128px|center]]
|[[NEO-DCR-T]]
|[[NEO-DCR-T]]
|?
|?
|
|Some MVS
|Some
|
|-
|[[File:mvs_sdr-t.jpg|x128px|center]]
|[[NEO-SDR-T]]
|?
|
|Some
|
|
|-
|-
Line 121: Line 89:
*Vector table swapping
*Vector table swapping
*Memory card address translation
*Memory card address translation
|Some
|Some AES, some MVS
|Some
|[[File:neo-e0_pinout.png|x128px|center]]
|[[File:neo-e0_pinout.png|x128px|center]]
|-
|-
Line 132: Line 99:
*LED marquee outputs
*LED marquee outputs
*Slot selection
*Slot selection
|
|Some MVS
|Some
|[[File:neo-f0_pinout.png|x128px|center]]
|[[File:neo-f0_pinout.png|x128px|center]]
|-
|-
Line 142: Line 108:
*Palette data buffer
*Palette data buffer
*Memory card data buffer
*Memory card data buffer
|Some
|All AES, some MVS ?
|Some
|[[File:neo-g0_pinout.png|x128px|center]]
|[[File:neo-g0_pinout.png|x128px|center]]
|-
|-
|[[File:mvs_zmc2.jpg|x128px|center]]
|[[File:cd2_grc.jpg|x128px|center]]
|[[NEO-ZMC2]] (QFP80R)
|[[NEO-GRC]]
|Graphics chip
|All CD1, all CD2
|
|
*Z80 Memory Controller
*Tile serializer
|Carts
|Some
|[[File:neo-zmc2_pinout.png|x128px|center]]
|-
|-
|[[File:mvs_pro-b0.jpg|x128px|center]]
|[[File:brd_grz.jpg|x128px|center]]
|[[PRO-B0]] (QFP136)
|[[NEO-GRZ]]
|First generation
|All-in-one [[GPU]]
*Palette arbiter
|All CDZ ?, ROM-only
*Z80 latch
|Some
|Early
|
|
|-
|-
|[[File:mvs_pro-c0.jpg|x128px|center]]
|[[File:cd2_mga.jpg|x128px|center]]
|[[PRO-C0]] (QFP136)
|[[NEO-MGA]]<br>NEO-MGA-T<br>NEO-MGA-T2
|First generation
|CD unit interface
*Address decoder
|All CD1, all CD2, all CDZ
*Glue
*Line buffer
*Palette arbiter
|Some
|Early
|
|
|-
|-
|[[File:mvs_pro-ct0.jpg|x128px|center]]
|[[File:cd2_ofc.jpg|x128px|center]]
|[[PRO-CT0]] (SDIP64)
|[[NEO-OFC]]
|[[C ROM]] character serializer and multiplexer
|Graphics chip
|Early carts
|All CD1, all CD2
|Early
|
|
|}
=Cartridge chips=
{| align=center class="regdef"
|'''Picture'''
|'''Reference'''
|'''Description'''
|'''Pinout'''
|-
|-
|[[File:crt_hd6301.jpg|x128px|center]]
|[[File:brd_pcm2.jpg|x128px|center]]
|[[HD6301]] (DIP40)
|[[NEO-PCM2]]
|Microcontroller
|
*[[PCM]]
*[[P ROM]] decoding, bankswitching and decryption
|
|
|
|-
|-
|[[File:crt_273.jpg|x128px|center]]
|[[File:mvs_sdr-t.jpg|x128px|center]]
|[[NEO-273]] (QFP64R)
|[[NEO-SDR-T]]
|C and [[S ROM]] address latch
|?
|[[File:neo-273_pinout.png|x128px|center]]
|Some MVS
|
|-
|-
|[[File:crt_cmc.jpg|x128px|center]]
|[[File:cd2_sft.jpg|x128px|center]]
|[[NEO-CMC]]
|[[NEO-SFT]]
|Graphics related
|All CD1, all CD2
|
|
*NEO-273 logic
*NEO-ZMC logic
*C ROM decryption
*C/S ROM multiplexer
*S ROM bankswitching
*M ROM decryption (NEOCMC50 only)
*M ROM bankswitching
|[[File:Neocmc_7050_7042_pinout.png|x200px|center]]
|-
|-
|[[File:crt_pcm.jpg|x128px|center]]
|[[File:cd2_sud.jpg|x128px|center]]
|[[PCM]] (QFP80R)
|[[NEO-SUD]]
|Z80 subsystem controler
|All CD1, all CD2
|
|
*ADPCM bus latches
*[[V ROM]] multiplexer
|[[File:pcm_pinout.png|x128px|center]]
|-
|-
|[[File:brd_pcm2.jpg|x128px|center]]
|[[File:cd2_voc.jpg|x128px|center]]
|[[NEO-PCM2]]
|[[NEO-VOC]]
|
|PCM memory handler
*[[NEO-PCM]]
|All CD1, all CD2
*[[P ROM]] decoding, bankswitching and decryption
|
|
|-
|-
|[[File:brd_pvc.jpg|x128px|center]]
|[[File:cd2_ysa.jpg|x128px|center]]
|[[NEO-PVC]]
|[[NEO-YSA]]
|[[P ROM]] decryption chip
|Audio subsystem chip
|Some
|
|
|-
|-
|[[File:crt_sma.jpg|x128px|center]]
|[[File:brd_ysa2.jpg|x128px|center]]
|[[NEO-SMA]]
|[[NEO-YSA2]]
|[[P ROM]] decryption chip
|Audio subsystem chip
|All CDZ ?, All ROM-only
|
|
|-
|-
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|[[NEO-ZMC]] (SOIC24)
|[[NEO-ZMC]] (SOIC24)
|Z80 Memory Controller
|Z80 Memory Controller
|
|[[File:neo-zmc_pinout.png|x128px|center]]
|[[File:neo-zmc_pinout.png|x128px|center]]
|-
|-
|[[File:crt_snk-9201.jpg|x128px|center]]
|[[File:mvs_zmc2.jpg|x128px|center]]
|[[SNK-9201]] (DIP64)
|[[NEO-ZMC2]] (QFP80R)
|[[P ROM]] protection chip
|
|
|}
*Z80 Memory Controller
 
*Tile serializer
=SNK chips, CD only=
|Some AES carts, some MVS
 
|[[File:neo-zmc2_pinout.png|x128px|center]]
{| align=center class="regdef"
|rowspan="2"|'''Picture'''
|rowspan="2"|'''Reference'''
|rowspan="2"|'''Description'''
|colspan="5"|'''Found in'''
|- style="background-color:AllEEE;"
|'''CD1'''
|'''CD2'''
|'''CDZ'''
|'''Pinout'''
|-
|-
|[[File:cd2_grc.jpg|x128px|center]]
|[[File:crt_pcm.jpg|x128px|center]]
|[[NEO-GRC]]
|[[PCM]] (QFP80R)
|Graphics chip
|All
|All
|?
|
|
|-
*ADPCM bus latches
|[[File:cd2_mga.jpg|x128px|center]]
*[[V ROM]] multiplexer
|[[NEO-MGA]]<br>NEO-MGA-T<br>NEO-MGA-T2
|CD unit interface
|All
|All
|All
|
|
|[[File:pcm_pinout.png|x128px|center]]
|-
|-
|[[File:cd2_ofc.jpg|x128px|center]]
|[[File:mvs_pro-b0.jpg|x128px|center]]
|[[NEO-OFC]]
|[[PRO-B0]] (QFP136)
|Graphics chip
|First generation
|All
*Palette arbiter
|All
*Z80 latch
|?
|Some AES, some MVS
|
|
|-
|-
|[[File:cd2_sft.jpg|x128px|center]]
|[[File:mvs_pro-c0.jpg|x128px|center]]
|[[NEO-SFT]]
|[[PRO-C0]] (QFP136)
|Graphics related
|First generation
|All
*Address decoder
|All
*Glue
|?
*Line buffer
*Palette arbiter
|Some AES, some MVS
|
|
|-
|-
|[[File:cd2_sud.jpg|x128px|center]]
|[[File:mvs_pro-ct0.jpg|x64px|center]]
|[[NEO-SUD]]
|[[PRO-CT0]] (SDIP64)
|Z80 subsystem controler
|[[C ROM]] character serializer and multiplexer
|All
|Some AES carts, some MVS
|All
|[[File:pro-ct0_pinout.png|x128px|center]]
|?
|[[File:neo-sud_pinout.png|x128px|center]]
|-
|-
|[[File:cd2_voc.jpg|x128px|center]]
|[[File:brd_pvc.jpg|x128px|center]]
|[[NEO-VOC]]
|[[NEO-PVC]]
|PCM memory handler
|[[P ROM]] decryption chip
|All
|
|All
|
|?
|[[File:neo-voc_pinout.png|x128px|center]]
|-
|-
|[[File:cd2_ysa.jpg|x128px|center]]
|[[File:crt_sma.jpg|x128px|center]]
|[[NEO-YSA]]
|[[NEO-SMA]]
|Audio subsystem chip
|[[P ROM]] decryption chip
|
|Some
|
|
|
|
Line 368: Line 286:
|All
|All
|?
|?
|-
|[[File:crt_hd6301.jpg|x128px|center]]
|[[HD6301]] (DIP40)
|Microcontroller
|colspan="5"|[[Multiplayer]] cartridges
|-
|-
|[[File:cd2_lc78815.jpg|x128px|center]]
|[[File:cd2_lc78815.jpg|x128px|center]]
Line 482: Line 405:
|AES systems
|AES systems
|-
|-
|[[File:cd2_top-sp1-1.jpg|x128px|center]]
|Picture needed
|TOP-SP1-1
|TOP-SP1-1
|CD2 BIOS
|CD2 BIOS
|Top loading CD systems (LC8953 versions)
|Top loading CD systems (LC8953 versions)
|-
|-
|[[File:cd2_top-sp1-2.jpg|128px|center]]
|Picture needed
|TOP-SP1-2
|TOP-SP1-2
|CD2 BIOS
|CD2 BIOS

Revision as of 19:57, 3 July 2012

Needed

Picture Reference Description Found in Pinout
LSPC-A0 (QFP160) First generation GPU Some AES, some MVS
LSPC2-A2 Second generation graphics chip Some AES, some MVS
File:Lspc2-a2 pinout.png
Need picture NEO-257 (QFP64R) Quad 74HC257 Some MVS
File:Neo-257 pinout.png
NEO-273 (QFP64R) C and S ROM address latch
File:Neo-273 pinout.png
NEO-B1 Second generation graphics chip
  • Sprite and FIX multiplexer
  • Line buffers
  • Palette arbiter
Some AES, some MVS
File:Neo-b1 pinout.png
NEO-BUF Dual 8-bit bidirectional buffer CD1, CD2
File:Neo-buf pinout.png
NEO-C1
  • Address decoder
  • Joystick inputs
Some AES, some MVS
File:Neo-c1 pinout.png
NEO-D0 (QFP64R) Audio subsystem controller All AES ?, some MVS
File:Neo-d0 pinout.png
NEO-CMC
  • NEO-273 logic
  • NEO-ZMC logic
  • C ROM decryption
  • C/S ROM multiplexer
  • S ROM bankswitching
  • M ROM decryption (NEOCMC50 only)
  • M ROM bankswitching
Some cartridges
File:Brd dcr-t.jpg
NEO-DCR-T ? Some MVS
NEO-E0 (QFP64R)
  • Vector table swapping
  • Memory card address translation
Some AES, some MVS
NEO-F0 (QFP64R)
  • Calendar access
  • Dip/cab switches, coin counters
  • LED marquee outputs
  • Slot selection
Some MVS
File:Neo-f0 pinout.png
NEO-G0 (QFP64R)

AES specific ?

  • Palette data buffer
  • Memory card data buffer
All AES, some MVS ?
File:Neo-g0 pinout.png
NEO-GRC Graphics chip All CD1, all CD2
NEO-GRZ All-in-one GPU All CDZ ?, ROM-only
NEO-MGA
NEO-MGA-T
NEO-MGA-T2
CD unit interface All CD1, all CD2, all CDZ
NEO-OFC Graphics chip All CD1, all CD2
NEO-PCM2
  • PCM
  • P ROM decoding, bankswitching and decryption
File:Mvs sdr-t.jpg
NEO-SDR-T ? Some MVS
NEO-SFT Graphics related All CD1, all CD2
NEO-SUD Z80 subsystem controler All CD1, all CD2
NEO-VOC PCM memory handler All CD1, all CD2
NEO-YSA Audio subsystem chip Some
NEO-YSA2 Audio subsystem chip All CDZ ?, All ROM-only
NEO-ZMC (SOIC24) Z80 Memory Controller
File:Neo-zmc pinout.png
NEO-ZMC2 (QFP80R)
  • Z80 Memory Controller
  • Tile serializer
Some AES carts, some MVS
File:Neo-zmc2 pinout.png
PCM (QFP80R)
  • ADPCM bus latches
  • V ROM multiplexer
File:Pcm pinout.png
PRO-B0 (QFP136) First generation
  • Palette arbiter
  • Z80 latch
Some AES, some MVS
PRO-C0 (QFP136) First generation
  • Address decoder
  • Glue
  • Line buffer
  • Palette arbiter
Some AES, some MVS
PRO-CT0 (SDIP64) C ROM character serializer and multiplexer Some AES carts, some MVS
NEO-PVC P ROM decryption chip
NEO-SMA P ROM decryption chip


Other chips

Picture Reference Description Found in
AES MVS CD1 CD2 CDZ
68HC000 (DIP64) 16bit CPU All Some
68HC000 (PLCC68) Some All All All
Sony CXA1145 RGB encoder All
Sony CXA1645 ? All ?
HD6301 (DIP40) Microcontroller Multiplayer cartridges
Sanyo LC78815 Stereo DAC ? All
Sanyo LC89515 CD host and error corrector All All ?
Sanyo LC8953 PUPPET All Some ?
Sanyo LC98000 PUPPET replacement Some ?
Nec UPD4990 Real Time Clock All
Yamaha YM2610 Sound synthesizer All All All Some
Yamaha YM3016 Audio DAC All All All Some
z80 (DIP40) 8bit CPU All Some
z80 (SOIC) Some All All All


Memory chips

Picture Reference Description Found in
LO Shrink lookup ROM All systems
SP-S2 MVS BIOS MVS systems
SM1 Embedded sound driver ROM
SFIX Embedded Fix ROM
NEO-EP0 AES BIOS AES systems
Picture needed TOP-SP1-1 CD2 BIOS Top loading CD systems (LC8953 versions)
Picture needed TOP-SP1-2 CD2 BIOS Top loading CD systems (LC98000 versions)
FRONT-SP1 CD1 BIOS Front loading CD systems