Category:Chips: Difference between revisions

From NeoGeo Development Wiki
Jump to navigation Jump to search
mNo edit summary
mNo edit summary
Line 32: Line 32:
|[[NEO-273]] (QFP64R)
|[[NEO-273]] (QFP64R)
|C and [[S ROM]] address latches
|C and [[S ROM]] address latches
|
|Cartridges
|[[File:neo-273_pinout.png|x128px|center]]
|[[File:neo-273_pinout.png|x128px|center]]
|-
|-
Line 47: Line 47:
|[[NEO-BUF]]
|[[NEO-BUF]]
|Dual 8-bit bidirectional buffer
|Dual 8-bit bidirectional buffer
|CD1, CD2
|CD1, CD2, some late MVS
|[[File:neo-buf_pinout.png|x128px|center]]
|[[File:neo-buf_pinout.png|x128px|center]]
|-
|-
Line 157: Line 157:
*[[PCM]]
*[[PCM]]
*[[P ROM]] decoding, bankswitching and decryption
*[[P ROM]] decoding, bankswitching and decryption
|
|ROM-only boards
|[[File:neo-pcm2_pinout.png|x128px|center]]
|[[File:neo-pcm2_pinout.png|x128px|center]]
|-
|-
Line 163: Line 163:
|[[NEO-SDR-T]]
|[[NEO-SDR-T]]
|?
|?
|Some MVS
|Some MVS, All [[Neo Print]]s
|
|
|-
|-
Line 187: Line 187:
|[[NEO-YSA]]
|[[NEO-YSA]]
|Audio subsystem chip
|Audio subsystem chip
|Some
|Some CD2
|
|
|-
|-
|[[File:brd_ysa2.jpg|x128px|center]]
|[[File:brd_ysa2.jpg|x128px|center]]
|[[NEO-YSA2]]
|[[NEO-YSA2]]
|Audio subsystem chip
|Complete audio subsystem chip
*Embedded Z80
*Embedded YM2610
|All CDZ ?, All ROM-only
|All CDZ ?, All ROM-only
|
|
Line 199: Line 201:
|[[NEO-ZMC]] (SOIC24)
|[[NEO-ZMC]] (SOIC24)
|Z80 Memory Controller
|Z80 Memory Controller
|
|Cartridges
|[[File:neo-zmc_pinout.png|x128px|center]]
|[[File:neo-zmc_pinout.png|x128px|center]]
|-
|-
Line 207: Line 209:
*Z80 Memory Controller
*Z80 Memory Controller
*Sprite tile serializer
*Sprite tile serializer
|Some AES carts, some MVS
|AES carts, some MVS
|[[File:neo-zmc2_pinout.png|x128px|center]]
|[[File:neo-zmc2_pinout.png|x128px|center]]
|-
|-
Line 215: Line 217:
*ADPCM bus latches
*ADPCM bus latches
*[[V ROM]] multiplexer
*[[V ROM]] multiplexer
|
|Cartridges
|[[File:pcm_pinout.png|x128px|center]]
|[[File:pcm_pinout.png|x128px|center]]
|-
|-

Revision as of 03:49, 31 December 2015

Needed

Picture Reference Description Found in Pinout
LSPC-A0 (QFP160) First generation graphics chip Some AES, some MVS
File:Lspc-a0 pinout.png
 LSPC2-A2 Second generation graphics chip Some AES, some MVS
File:Lspc2-a2 pinout.png
 NEO-257 (QFP64R) Quad 74HC257, 2-to-1 multiplexers Some MVS
NEO-273 (QFP64R) C and S ROM address latches Cartridges
File:Neo-273 pinout.png
 NEO-B1 Second generation graphics chip
  • Sprite and FIX multiplexer
  • Line buffers
  • Palette arbiter
 Some AES, some MVS
File:Neo-b1 pinout.png
 NEO-BUF Dual 8-bit bidirectional buffer CD1, CD2, some late MVS
File:Neo-buf pinout.png
 NEO-C1
  • Address decoder
  • Joystick inputs
  • Z80 interface
 Some AES, some MVS
File:Neo-c1 pinout.png
 NEO-D0 (QFP64R) *Audio subsystem controller All AES ?, some MVS
File:Neo-d0 pinout.png
 NEO-CMC
  • NEO-273 logic
  • NEO-ZMC logic
  • C ROM decryption
  • C/S ROM multiplexer
  • S ROM bankswitching
  • M ROM decryption (NEOCMC50 only)
  • M ROM bankswitching
 Some cartridges
NEO-DCR-T ? Some MVS
NEO-E0 (QFP64R)
  • Vector table swapping
  • Buffer/driver
 Some AES, some MVS
NEO-F0 (QFP64R)
  • Calendar access
  • Dip/cab switches, coin counters
  • LED marquee outputs
  • Slot selection
 Some MVS
File:Neo-f0 pinout.png
 NEO-G0 (QFP64R)

Quad 245 bidirectional buffer.

  • Palette data buffer
  • Memory card data buffer
  • 68k data bus buffer
 All AES, some MVS ?
File:Neo-g0 aes pinout.png
 NEO-GRC Graphics chip All CD1, all CD2
NEO-GRC2-F Graphics chip Some MVS
NEO-GRZ All-in-one GPU All CDZ ?, ROM-only
NEO-I0 Multi-purpose MVS specific chip.
  • SFIX ROM address latch
  • Coin counter and lockout outputs
 Some MVS
File:Neo-i0 pinout.png
 NEO-MGA
NEO-MGA-T
NEO-MGA-T2 		CD unit interface, latches, address decoding ? All CD1, all CD2, all CDZ, some MVS
File:Neo-mga.png
 NEO-OFC Graphics chip All CD1, all CD2
NEO-PCM2
  • PCM
  • P ROM decoding, bankswitching and decryption
 ROM-only boards
NEO-SDR-T ? Some MVS, All Neo Prints
NEO-SFT Graphics related All CD1, all CD2
NEO-SUD Z80 subsystem controler All CD1, all CD2
NEO-VOC PCM memory handler All CD1, all CD2
NEO-YSA Audio subsystem chip Some CD2
NEO-YSA2 Complete audio subsystem chip
  • Embedded Z80
  • Embedded YM2610
 All CDZ ?, All ROM-only
NEO-ZMC (SOIC24) Z80 Memory Controller Cartridges
File:Neo-zmc pinout.png
 NEO-ZMC2 (QFP80R)
  • Z80 Memory Controller
  • Sprite tile serializer
 AES carts, some MVS
File:Neo-zmc2 pinout.png
 PCM (QFP80R)
  • ADPCM bus latches
  • V ROM multiplexer
 Cartridges
File:Pcm pinout.png
 PSTG-SNK

Neo Print GPU.

PRO-B0 (QFP136) First generation
  • Palette arbiter
  • Z80 latch
 Some AES, some MVS
PRO-C0 (QFP136) First generation
  • Address decoder
  • Glue
  • Line buffer
  • Palette arbiter
 Some AES, some MVS
PRO-CT0 (SDIP64) C ROM character serializer and multiplexer Some AES carts, some MVS
NEO-PVC P ROM decryption chip
NEO-SMA P ROM decryption chip


Other chips

Picture Reference Description Found in
AES MVS CD1 CD2 CDZ
68HC000 (DIP64) 16bit CPU All Some
68HC000 (PLCC68) Some All All All
Sony CXA1145 RGB encoder All
Sony CXA1645 ? All ?
HD6301 (DIP40) Microcontroller Multiplayer cartridges
Sanyo LC78815 Stereo DAC ? All
Sanyo LC89515 CD host and error corrector All All ?
Sanyo LC8953 PUPPET All Some ?
Sanyo LC98000 PUPPET replacement Some ?
Nec UPD4990 Real Time Clock All
Yamaha YM2610 Sound synthesizer All All All Some
Yamaha YM3016 Audio DAC All All All Some
z80 (DIP40) 8bit CPU All Some
z80 (SOIC) Some All All All


Memory chips

Picture Reference Description Found in
LO Shrink lookup ROM All systems
SP-S2 MVS System ROM MVS systems
SM1 Embedded sound driver ROM
SFIX Embedded Fix ROM
NEO-EP0 AES System ROM AES systems
Picture needed TOP-SP1-1 CD2 System ROM Top loading CD systems (LC8953 versions)
Picture needed TOP-SP1-2 CD2 System ROM Top loading CD systems (LC98000 versions)
FRONT-SP1 CD1 System ROM Front loading CD systems

Subcategories

This category has only the following subcategory.

C

Retrieved from "https://wiki.neogeodev.org/index.php?title=Category:Chips&oldid=4555"